forked from luck/tmp_suning_uos_patched
04dc82e116
Based on 1 normalized pattern(s): this program is free software you can distribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 24 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190115.872212424@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
35 lines
760 B
C
35 lines
760 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Purna Chandra Mandal,<purna.mandal@microchip.com>
|
|
* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
|
|
*/
|
|
|
|
#ifndef _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_
|
|
#define _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_
|
|
|
|
/* clock output indices */
|
|
#define POSCCLK 0
|
|
#define FRCCLK 1
|
|
#define BFRCCLK 2
|
|
#define LPRCCLK 3
|
|
#define SOSCCLK 4
|
|
#define FRCDIVCLK 5
|
|
#define PLLCLK 6
|
|
#define SCLK 7
|
|
#define PB1CLK 8
|
|
#define PB2CLK 9
|
|
#define PB3CLK 10
|
|
#define PB4CLK 11
|
|
#define PB5CLK 12
|
|
#define PB6CLK 13
|
|
#define PB7CLK 14
|
|
#define REF1CLK 15
|
|
#define REF2CLK 16
|
|
#define REF3CLK 17
|
|
#define REF4CLK 18
|
|
#define REF5CLK 19
|
|
#define UPLLCLK 20
|
|
#define MAXCLKS 21
|
|
|
|
#endif /* _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ */
|