forked from luck/tmp_suning_uos_patched
92704a1c63
On uniprocessor, it's always zero for optimize that. On SMP, the jmpl to the stub kills the return address stack in the cpu branch prediction logic, so expand the code sequence inline and use a code patching section to fix things up. This also always better and explicit register selection, which will be taken advantage of in a future changeset. The hard_smp_processor_id() function is big, so do not inline it. Fix up tests for Jalapeno to also test for Serrano chips too. These tests want "jbus Ultra-IIIi" cases to match, so that is what we should test for. Signed-off-by: David S. Miller <davem@davemloft.net>
106 lines
2.0 KiB
ArmAsm
106 lines
2.0 KiB
ArmAsm
/* ld script to make UltraLinux kernel */
|
|
|
|
#include <asm-generic/vmlinux.lds.h>
|
|
|
|
OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
|
|
OUTPUT_ARCH(sparc:v9a)
|
|
ENTRY(_start)
|
|
|
|
jiffies = jiffies_64;
|
|
SECTIONS
|
|
{
|
|
swapper_low_pmd_dir = 0x0000000000402000;
|
|
. = 0x4000;
|
|
.text 0x0000000000404000 :
|
|
{
|
|
*(.text)
|
|
SCHED_TEXT
|
|
LOCK_TEXT
|
|
KPROBES_TEXT
|
|
*(.gnu.warning)
|
|
} =0
|
|
_etext = .;
|
|
PROVIDE (etext = .);
|
|
|
|
RODATA
|
|
|
|
.data :
|
|
{
|
|
*(.data)
|
|
CONSTRUCTORS
|
|
}
|
|
.data1 : { *(.data1) }
|
|
. = ALIGN(64);
|
|
.data.cacheline_aligned : { *(.data.cacheline_aligned) }
|
|
. = ALIGN(64);
|
|
.data.read_mostly : { *(.data.read_mostly) }
|
|
_edata = .;
|
|
PROVIDE (edata = .);
|
|
.fixup : { *(.fixup) }
|
|
|
|
. = ALIGN(16);
|
|
__start___ex_table = .;
|
|
__ex_table : { *(__ex_table) }
|
|
__stop___ex_table = .;
|
|
|
|
. = ALIGN(8192);
|
|
__init_begin = .;
|
|
.init.text : {
|
|
_sinittext = .;
|
|
*(.init.text)
|
|
_einittext = .;
|
|
}
|
|
.init.data : { *(.init.data) }
|
|
. = ALIGN(16);
|
|
__setup_start = .;
|
|
.init.setup : { *(.init.setup) }
|
|
__setup_end = .;
|
|
__initcall_start = .;
|
|
.initcall.init : {
|
|
*(.initcall1.init)
|
|
*(.initcall2.init)
|
|
*(.initcall3.init)
|
|
*(.initcall4.init)
|
|
*(.initcall5.init)
|
|
*(.initcall6.init)
|
|
*(.initcall7.init)
|
|
}
|
|
__initcall_end = .;
|
|
__con_initcall_start = .;
|
|
.con_initcall.init : { *(.con_initcall.init) }
|
|
__con_initcall_end = .;
|
|
SECURITY_INIT
|
|
. = ALIGN(4);
|
|
__tsb_phys_patch = .;
|
|
.tsb_phys_patch : { *(.tsb_phys_patch) }
|
|
__tsb_phys_patch_end = .;
|
|
__cpuid_patch = .;
|
|
.cpuid_patch : { *(.cpuid_patch) }
|
|
__cpuid_patch_end = .;
|
|
. = ALIGN(8192);
|
|
__initramfs_start = .;
|
|
.init.ramfs : { *(.init.ramfs) }
|
|
__initramfs_end = .;
|
|
. = ALIGN(8192);
|
|
__per_cpu_start = .;
|
|
.data.percpu : { *(.data.percpu) }
|
|
__per_cpu_end = .;
|
|
. = ALIGN(8192);
|
|
__init_end = .;
|
|
__bss_start = .;
|
|
.sbss : { *(.sbss) *(.scommon) }
|
|
.bss :
|
|
{
|
|
*(.dynbss)
|
|
*(.bss)
|
|
*(COMMON)
|
|
}
|
|
_end = . ;
|
|
PROVIDE (end = .);
|
|
/DISCARD/ : { *(.exit.text) *(.exit.data) *(.exitcall.exit) }
|
|
|
|
STABS_DEBUG
|
|
|
|
DWARF_DEBUG
|
|
}
|