forked from luck/tmp_suning_uos_patched
52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
#ifndef ASM_MSIDEF_H
|
|
#define ASM_MSIDEF_H
|
|
|
|
/*
|
|
* Constants for Intel APIC based MSI messages.
|
|
*/
|
|
|
|
/*
|
|
* Shifts for MSI data
|
|
*/
|
|
|
|
#define MSI_DATA_VECTOR_SHIFT 0
|
|
#define MSI_DATA_VECTOR_MASK 0x000000ff
|
|
#define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \
|
|
MSI_DATA_VECTOR_MASK)
|
|
|
|
#define MSI_DATA_DELIVERY_MODE_SHIFT 8
|
|
#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
|
|
#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
|
|
|
|
#define MSI_DATA_LEVEL_SHIFT 14
|
|
#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
|
|
#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
|
|
|
|
#define MSI_DATA_TRIGGER_SHIFT 15
|
|
#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
|
|
#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
|
|
|
|
/*
|
|
* Shift/mask fields for msi address
|
|
*/
|
|
|
|
#define MSI_ADDR_BASE_HI 0
|
|
#define MSI_ADDR_BASE_LO 0xfee00000
|
|
|
|
#define MSI_ADDR_DEST_MODE_SHIFT 2
|
|
#define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT)
|
|
#define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT)
|
|
|
|
#define MSI_ADDR_REDIRECTION_SHIFT 3
|
|
#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
|
|
/* dedicated cpu */
|
|
#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
|
|
/* lowest priority */
|
|
|
|
#define MSI_ADDR_DEST_ID_SHIFT 12
|
|
#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
|
|
#define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \
|
|
MSI_ADDR_DEST_ID_MASK)
|
|
|
|
#endif /* ASM_MSIDEF_H */
|