forked from luck/tmp_suning_uos_patched
043d07084b
The noexec support on s390 does not rely on a bit in the page table entry but utilizes the secondary space mode to distinguish between memory accesses for instructions vs. data. The noexec code relies on the assumption that the cpu will always use the secondary space page table for data accesses while it is running in the secondary space mode. Up to the z9-109 class machines this has been the case. Unfortunately this is not true anymore with z10 and later machines. The load-relative-long instructions lrl, lgrl and lgfrl access the memory operand using the same addressing-space mode that has been used to fetch the instruction. This breaks the noexec mode for all user space binaries compiled with march=z10 or later. The only option is to remove the current noexec support. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
96 lines
2.7 KiB
C
96 lines
2.7 KiB
C
/*
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* include/asm-s390/mmu_context.h
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*
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* S390 version
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*
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* Derived from "include/asm-i386/mmu_context.h"
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*/
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#ifndef __S390_MMU_CONTEXT_H
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#define __S390_MMU_CONTEXT_H
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#include <asm/pgalloc.h>
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#include <asm/uaccess.h>
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#include <asm/tlbflush.h>
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#include <asm-generic/mm_hooks.h>
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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atomic_set(&mm->context.attach_count, 0);
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mm->context.flush_mm = 0;
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mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
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#ifdef CONFIG_64BIT
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mm->context.asce_bits |= _ASCE_TYPE_REGION3;
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#endif
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if (current->mm && current->mm->context.alloc_pgste) {
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/*
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* alloc_pgste indicates, that any NEW context will be created
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* with extended page tables. The old context is unchanged. The
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* page table allocation and the page table operations will
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* look at has_pgste to distinguish normal and extended page
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* tables. The only way to create extended page tables is to
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* set alloc_pgste and then create a new context (e.g. dup_mm).
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* The page table allocation is called after init_new_context
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* and if has_pgste is set, it will create extended page
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* tables.
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*/
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mm->context.has_pgste = 1;
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mm->context.alloc_pgste = 1;
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} else {
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mm->context.has_pgste = 0;
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mm->context.alloc_pgste = 0;
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}
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mm->context.asce_limit = STACK_TOP_MAX;
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crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
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return 0;
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}
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#define destroy_context(mm) do { } while (0)
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#ifndef __s390x__
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#define LCTL_OPCODE "lctl"
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#else
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#define LCTL_OPCODE "lctlg"
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#endif
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static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk)
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{
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pgd_t *pgd = mm->pgd;
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S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
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if (user_mode != HOME_SPACE_MODE) {
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/* Load primary space page table origin. */
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asm volatile(LCTL_OPCODE" 1,1,%0\n"
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: : "m" (S390_lowcore.user_asce) );
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} else
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/* Load home space page table origin. */
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asm volatile(LCTL_OPCODE" 13,13,%0"
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: : "m" (S390_lowcore.user_asce) );
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set_fs(current->thread.mm_segment);
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}
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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update_mm(next, tsk);
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atomic_dec(&prev->context.attach_count);
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WARN_ON(atomic_read(&prev->context.attach_count) < 0);
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atomic_inc(&next->context.attach_count);
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/* Check for TLBs not flushed yet */
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if (next->context.flush_mm)
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__tlb_flush_mm(next);
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}
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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#define deactivate_mm(tsk,mm) do { } while (0)
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static inline void activate_mm(struct mm_struct *prev,
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struct mm_struct *next)
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{
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switch_mm(prev, next, current);
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}
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#endif /* __S390_MMU_CONTEXT_H */
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