forked from luck/tmp_suning_uos_patched
ac619f4eba
With CPU hotplug, there is a theoretical race between other CMOS (namely RTC) accesses and those done in the SMP secondary processor bringup path. I am unware of the problem having been noticed by anyone in practice, but it would very likely be rather spurious and very hard to reproduce. So to be on the safe side, acquire rtc_lock around those accesses. Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: John Stultz <john.stultz@linaro.org> Link: http://lkml.kernel.org/r/4E257AE7020000780004E2FF@nat28.tlf.novell.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
69 lines
1.5 KiB
C
69 lines
1.5 KiB
C
/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
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* which needs to alter them. */
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static inline void smpboot_clear_io_apic_irqs(void)
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{
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#ifdef CONFIG_X86_IO_APIC
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io_apic_irqs = 0;
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#endif
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}
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static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
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{
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unsigned long flags;
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spin_lock_irqsave(&rtc_lock, flags);
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CMOS_WRITE(0xa, 0xf);
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spin_unlock_irqrestore(&rtc_lock, flags);
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local_flush_tlb();
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pr_debug("1.\n");
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*((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_high)) =
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start_eip >> 4;
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pr_debug("2.\n");
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*((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_low)) =
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start_eip & 0xf;
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pr_debug("3.\n");
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}
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static inline void smpboot_restore_warm_reset_vector(void)
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{
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unsigned long flags;
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/*
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* Install writable page 0 entry to set BIOS data area.
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*/
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local_flush_tlb();
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/*
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* Paranoid: Set warm reset code and vector here back
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* to default values.
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*/
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spin_lock_irqsave(&rtc_lock, flags);
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CMOS_WRITE(0, 0xf);
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spin_unlock_irqrestore(&rtc_lock, flags);
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*((volatile u32 *)phys_to_virt(apic->trampoline_phys_low)) = 0;
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}
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static inline void __init smpboot_setup_io_apic(void)
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{
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#ifdef CONFIG_X86_IO_APIC
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/*
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* Here we can be sure that there is an IO-APIC in the system. Let's
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* go and set it up:
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*/
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if (!skip_ioapic_setup && nr_ioapics)
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setup_IO_APIC();
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else {
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nr_ioapics = 0;
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}
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#endif
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}
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static inline void smpboot_clear_io_apic(void)
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{
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#ifdef CONFIG_X86_IO_APIC
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nr_ioapics = 0;
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#endif
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}
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