kernel_optimize_test/arch/x86/kvm
Nadav Amit 9b88ae99d2 KVM: x86: MOV CR/DR emulation should ignore mod
MOV CR/DR instructions ignore the mod field (in the ModR/M byte). As the SDM
states: "The 2 bits in the mod field are ignored".  Accordingly, the second
operand of these instructions is always a general purpose register.

The current emulator implementation does not do so. If the mod bits do not
equal 3, it expects the second operand to be in memory.

Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-27 10:22:56 +02:00
..
cpuid.c kvm: x86: emulate monitor and mwait instructions as nop 2014-05-08 15:40:49 +02:00
cpuid.h KVM: x86: Mark bit 7 in long-mode PDPTE according to 1GB pages support 2014-05-07 17:25:22 +02:00
emulate.c KVM: x86: MOV CR/DR emulation should ignore mod 2014-05-27 10:22:56 +02:00
i8254.c
i8254.h
i8259.c
irq.c KVM: nVMX: Ack and write vector info to intr_info if L1 asks us to 2014-04-22 18:41:33 -03:00
irq.h
Kconfig
kvm_cache_regs.h
lapic.c KVM: lapic: sync highest ISR to hardware apic on EOI 2014-05-27 10:21:09 +02:00
lapic.h
Makefile
mmu_audit.c
mmu.c KVM: x86: Mark bit 7 in long-mode PDPTE according to 1GB pages support 2014-05-07 17:25:22 +02:00
mmu.h KVM: MMU: flush tlb out of mmu lock when write-protect the sptes 2014-04-23 17:49:52 -03:00
mmutrace.h
paging_tmpl.h Revert "KVM: Simplify kvm->tlbs_dirty handling" 2014-04-23 17:49:48 -03:00
pmu.c KVM: x86: Fix wrong/stuck PMU when guest does not use PMI 2014-04-23 17:46:52 -03:00
svm.c KVM: x86: get CPL from SS.DPL 2014-05-22 17:47:17 +02:00
trace.h KVM: x86: improve the usability of the 'kvm_pio' tracepoint 2014-05-05 22:42:05 +02:00
tss.h
vmx.c KVM: vmx: DR7 masking on task switch emulation is wrong 2014-05-22 17:47:18 +02:00
x86.c KVM: x86: drop set_rflags callback 2014-05-22 17:47:16 +02:00
x86.h