forked from luck/tmp_suning_uos_patched
a1efdaba2d
Currently reset methods are not specified directly in the ata_port_operations table. If a LLD wants to use custom reset methods, it should construct and use a error_handler which uses those reset methods. It's done this way for two reasons. First, the ops table already contained too many methods and adding four more of them would noticeably increase the amount of necessary boilerplate code all over low level drivers. Second, as ->error_handler uses those reset methods, it can get confusing. ie. By overriding ->error_handler, those reset ops can be made useless making layering a bit hazy. Now that ops table uses inheritance, the first problem doesn't exist anymore. The second isn't completely solved but is relieved by providing default values - most drivers can just override what it has implemented and don't have to concern itself about higher level callbacks. In fact, there currently is no driver which actually modifies error handling behavior. Drivers which override ->error_handler just wraps the standard error handler only to prepare the controller for EH. I don't think making ops layering strict has any noticeable benefit. This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and their PMP counterparts propoer ops. Default ops are provided in the base ops tables and drivers are converted to override individual reset methods instead of creating custom error_handler. * ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs aren't accessible. sata_promise doesn't need to use separate error_handlers for PATA and SATA anymore. * softreset is broken for sata_inic162x and sata_sx4. As libata now always prefers hardreset, this doesn't really matter but the ops are forced to NULL using ATA_OP_NULL for documentation purpose. * pata_hpt374 needs to use different prereset for the first and second PCI functions. This used to be done by branching from hpt374_error_handler(). The proper way to do this is to use separate ops and port_info tables for each function. Converted. Signed-off-by: Tejun Heo <htejun@gmail.com>
190 lines
5.0 KiB
C
190 lines
5.0 KiB
C
/*
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* pata_ns87410.c - National Semiconductor 87410 PATA for new ATA layer
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* (C) 2006 Red Hat Inc
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* Alan Cox <alan@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME "pata_ns87410"
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#define DRV_VERSION "0.4.6"
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/**
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* ns87410_pre_reset - probe begin
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* @link: ATA link
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* @deadline: deadline jiffies for the operation
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*
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* Check enabled ports
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*/
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static int ns87410_pre_reset(struct ata_link *link, unsigned long deadline)
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{
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struct ata_port *ap = link->ap;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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static const struct pci_bits ns87410_enable_bits[] = {
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{ 0x43, 1, 0x08, 0x08 },
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{ 0x47, 1, 0x08, 0x08 }
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};
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if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no]))
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return -ENOENT;
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return ata_std_prereset(link, deadline);
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}
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/**
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* ns87410_set_piomode - set initial PIO mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Program timing data. This is kept per channel not per device,
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* and only affects the data port.
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*/
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static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int port = 0x40 + 4 * ap->port_no;
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u8 idetcr, idefr;
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struct ata_timing at;
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static const u8 activebits[15] = {
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0, 1, 2, 3, 4,
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5, 5, 6, 6, 6,
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6, 7, 7, 7, 7
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};
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static const u8 recoverbits[12] = {
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0, 1, 2, 3, 4, 5, 6, 6, 7, 7, 7, 7
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};
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pci_read_config_byte(pdev, port + 3, &idefr);
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if (ata_pio_need_iordy(adev))
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idefr |= 0x04; /* IORDY enable */
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else
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idefr &= ~0x04;
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if (ata_timing_compute(adev, adev->pio_mode, &at, 30303, 1) < 0) {
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dev_printk(KERN_ERR, &pdev->dev, "unknown mode %d.\n", adev->pio_mode);
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return;
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}
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at.active = FIT(at.active, 2, 16) - 2;
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at.setup = FIT(at.setup, 1, 4) - 1;
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at.recover = FIT(at.recover, 1, 12) - 1;
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idetcr = (at.setup << 6) | (recoverbits[at.recover] << 3) | activebits[at.active];
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pci_write_config_byte(pdev, port, idetcr);
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pci_write_config_byte(pdev, port + 3, idefr);
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/* We use ap->private_data as a pointer to the device currently
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loaded for timing */
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ap->private_data = adev;
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}
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/**
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* ns87410_qc_issue_prot - command issue
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* @qc: command pending
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*
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* Called when the libata layer is about to issue a command. We wrap
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* this interface so that we can load the correct ATA timings if
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* necessary.
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*/
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static unsigned int ns87410_qc_issue_prot(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct ata_device *adev = qc->dev;
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/* If modes have been configured and the channel data is not loaded
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then load it. We have to check if pio_mode is set as the core code
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does not set adev->pio_mode to XFER_PIO_0 while probing as would be
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logical */
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if (adev->pio_mode && adev != ap->private_data)
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ns87410_set_piomode(ap, adev);
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return ata_qc_issue_prot(qc);
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}
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static struct scsi_host_template ns87410_sht = {
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ATA_PIO_SHT(DRV_NAME),
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};
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static struct ata_port_operations ns87410_port_ops = {
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.inherits = &ata_sff_port_ops,
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.qc_issue = ns87410_qc_issue_prot,
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.cable_detect = ata_cable_40wire,
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.set_piomode = ns87410_set_piomode,
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.prereset = ns87410_pre_reset,
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};
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static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info = {
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x0F,
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.port_ops = &ns87410_port_ops
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};
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const struct ata_port_info *ppi[] = { &info, NULL };
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return ata_pci_init_one(dev, ppi, &ns87410_sht, NULL);
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}
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static const struct pci_device_id ns87410[] = {
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{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), },
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{ },
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};
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static struct pci_driver ns87410_pci_driver = {
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.name = DRV_NAME,
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.id_table = ns87410,
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.probe = ns87410_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static int __init ns87410_init(void)
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{
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return pci_register_driver(&ns87410_pci_driver);
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}
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static void __exit ns87410_exit(void)
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{
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pci_unregister_driver(&ns87410_pci_driver);
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}
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for Nat Semi 87410");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, ns87410);
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MODULE_VERSION(DRV_VERSION);
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module_init(ns87410_init);
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module_exit(ns87410_exit);
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