forked from luck/tmp_suning_uos_patched
350f8f5631
Rather than having X86_L1_CACHE_BYTES and X86_L1_CACHE_SHIFT (with inconsistent defaults), just having the latter suffices as the former can be easily calculated from it. To be consistent, also change X86_INTERNODE_CACHE_BYTES to X86_INTERNODE_CACHE_SHIFT, and set it to 7 (128 bytes) for NUMA to account for last level cache line size (which here matters more than L1 cache line size). Finally, make sure the default value for X86_L1_CACHE_SHIFT, when X86_GENERIC is selected, is being seen before that for the individual CPU model options (other than on x86-64, where GENERIC_CPU is part of the choice construct, X86_GENERIC is a separate option on ix86). Signed-off-by: Jan Beulich <jbeulich@novell.com> Acked-by: Ravikiran Thirumalai <kiran@scalex86.org> Acked-by: Nick Piggin <npiggin@suse.de> LKML-Reference: <4AFD5710020000780001F8F0@vpn.id2.novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
24 lines
601 B
C
24 lines
601 B
C
#ifndef _ASM_X86_CACHE_H
|
|
#define _ASM_X86_CACHE_H
|
|
|
|
#include <linux/linkage.h>
|
|
|
|
/* L1 cache line size */
|
|
#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
|
|
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
|
|
|
|
#define __read_mostly __attribute__((__section__(".data.read_mostly")))
|
|
|
|
#define INTERNODE_CACHE_SHIFT CONFIG_X86_INTERNODE_CACHE_SHIFT
|
|
#define INTERNODE_CACHE_BYTES (1 << INTERNODE_CACHE_SHIFT)
|
|
|
|
#ifdef CONFIG_X86_VSMP
|
|
#ifdef CONFIG_SMP
|
|
#define __cacheline_aligned_in_smp \
|
|
__attribute__((__aligned__(INTERNODE_CACHE_BYTES))) \
|
|
__page_aligned_data
|
|
#endif
|
|
#endif
|
|
|
|
#endif /* _ASM_X86_CACHE_H */
|