kernel_optimize_test/virt/kvm
Eric Auger aa76829171 KVM: arm64: pmu: Fix chained SW_INCR counters
At the moment a SW_INCR counter always overflows on 32-bit
boundary, independently on whether the n+1th counter is
programmed as CHAIN.

Check whether the SW_INCR counter is a 64b counter and if so,
implement the 64b logic.

Fixes: 80f393a23b ("KVM: arm/arm64: Support chained PMU counters")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200124142535.29386-4-eric.auger@redhat.com
2020-01-28 12:50:33 +00:00
..
arm KVM: arm64: pmu: Fix chained SW_INCR counters 2020-01-28 12:50:33 +00:00
async_pf.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 504 2019-06-19 17:09:56 +02:00
async_pf.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 504 2019-06-19 17:09:56 +02:00
coalesced_mmio.c KVM: MMIO: get rid of odd out_err label in kvm_coalesced_mmio_init 2019-11-15 11:44:01 +01:00
coalesced_mmio.h
eventfd.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 504 2019-06-19 17:09:56 +02:00
irqchip.c KVM/arm updates for 5.3 2019-07-11 15:14:16 +02:00
Kconfig KVM: polling: add architecture backend to disable polling 2019-04-26 09:08:17 +02:00
kvm_main.c KVM/arm fixes for .5.5, take #1 2019-12-18 17:47:38 +01:00
vfio.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
vfio.h