kernel_optimize_test/arch/mips/power/cpu.c
Wu Zhangjin 363c55cae5 MIPS: Add hibernation support
[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support.  As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways.  So limit to !SMP.]

Reviewed-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Yan Hua <yanh@lemote.com>
Reviewed-by: Arnaud Patard <apatard@mandriva.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17 11:06:31 +01:00

44 lines
895 B
C

/*
* Suspend support specific for mips.
*
* Licensed under the GPLv2
*
* Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
* Author: Hu Hongbing <huhb@lemote.com>
* Wu Zhangjin <wuzj@lemote.com>
*/
#include <asm/suspend.h>
#include <asm/fpu.h>
#include <asm/dsp.h>
static u32 saved_status;
struct pt_regs saved_regs;
void save_processor_state(void)
{
saved_status = read_c0_status();
if (is_fpu_owner())
save_fp(current);
if (cpu_has_dsp)
save_dsp(current);
}
void restore_processor_state(void)
{
write_c0_status(saved_status);
if (is_fpu_owner())
restore_fp(current);
if (cpu_has_dsp)
restore_dsp(current);
}
int pfn_is_nosave(unsigned long pfn)
{
unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
}