forked from luck/tmp_suning_uos_patched
446c92b290
This is a fix for the following crash observed in 2.6.29-rc3: http://lkml.org/lkml/2009/1/29/150 On ARM it doesn't make sense to trace a naked function because then mcount is called without stack and frame pointer being set up and there is no chance to restore the lr register to the value before mcount was called. Reported-by: Matthias Kaehlcke <matthias@kaehlcke.net> Tested-by: Matthias Kaehlcke <matthias@kaehlcke.net> Cc: Abhishek Sagar <sagar.abhishek@gmail.com> Cc: Steven Rostedt <rostedt@home.goodmis.org> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/*
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* linux/arch/arm/mm/copypage-v3.c
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*
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* Copyright (C) 1995-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/highmem.h>
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/*
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* ARMv3 optimised copy_user_highpage
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*
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* FIXME: do we need to handle cache stuff...
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*/
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static void __naked
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v3_copy_user_page(void *kto, const void *kfrom)
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{
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asm("\n\
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stmfd sp!, {r4, lr} @ 2\n\
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mov r2, %2 @ 1\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
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1: stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
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stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\
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stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmia %0!, {r3, r4, ip, lr} @ 4\n\
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subs r2, r2, #1 @ 1\n\
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stmia %1!, {r3, r4, ip, lr} @ 4\n\
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ldmneia %0!, {r3, r4, ip, lr} @ 4\n\
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bne 1b @ 1\n\
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ldmfd sp!, {r4, pc} @ 3"
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:
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: "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));
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}
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void v3_copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr)
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{
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void *kto, *kfrom;
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kto = kmap_atomic(to, KM_USER0);
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kfrom = kmap_atomic(from, KM_USER1);
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v3_copy_user_page(kto, kfrom);
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kunmap_atomic(kfrom, KM_USER1);
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kunmap_atomic(kto, KM_USER0);
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}
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/*
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* ARMv3 optimised clear_user_page
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*
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* FIXME: do we need to handle cache stuff...
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*/
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void v3_clear_user_highpage(struct page *page, unsigned long vaddr)
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{
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void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
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asm volatile("\n\
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mov r1, %2 @ 1\n\
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mov r2, #0 @ 1\n\
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mov r3, #0 @ 1\n\
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mov ip, #0 @ 1\n\
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mov lr, #0 @ 1\n\
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1: stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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stmia %0!, {r2, r3, ip, lr} @ 4\n\
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subs r1, r1, #1 @ 1\n\
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bne 1b @ 1"
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: "=r" (ptr)
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: "0" (kaddr), "I" (PAGE_SIZE / 64)
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: "r1", "r2", "r3", "ip", "lr");
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kunmap_atomic(kaddr, KM_USER0);
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}
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struct cpu_user_fns v3_user_fns __initdata = {
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.cpu_clear_user_highpage = v3_clear_user_highpage,
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.cpu_copy_user_highpage = v3_copy_user_highpage,
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};
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