forked from luck/tmp_suning_uos_patched
8ce8ebeb57
Since commit 54196ccbe0 (of: consolidate linker section OF match table
declarations) which went into 3.16-rc1 the following compiler warning is
generated:
In file included from drivers/clk/clk-efm32gg.c:12:0: include/linux/of.h:772:20:
warning: comparison of distinct pointer types lacks a cast [enabled by default]
.data = (fn == (fn_type)NULL) ? fn : fn }
^
include/linux/of.h:785:3: note: in expansion of macro '_OF_DECLARE'
_OF_DECLARE(table, name, compat, fn, of_init_fn_1)
^
include/linux/clk-provider.h:545:42: note: in expansion of macro 'OF_DECLARE_1'
#define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn)
^
drivers/clk/clk-efm32gg.c:81:1: note: in expansion of macro 'CLK_OF_DECLARE'
CLK_OF_DECLARE(efm32ggcmu, "efm32gg,cmu", efm32gg_cmu_init);
^
Fix it by making efm32gg_cmu_init return void.
Cc: Rob Herring <robh@kernel.org>
Reported-by: Bryan Hundven <bryanhundven@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
82 lines
3.2 KiB
C
82 lines
3.2 KiB
C
/*
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* Copyright (C) 2013 Pengutronix
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* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/clk-provider.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <dt-bindings/clock/efm32-cmu.h>
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#define CMU_HFPERCLKEN0 0x44
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static struct clk *clk[37];
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static struct clk_onecell_data clk_data = {
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.clks = clk,
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.clk_num = ARRAY_SIZE(clk),
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};
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static void __init efm32gg_cmu_init(struct device_node *np)
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{
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int i;
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void __iomem *base;
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for (i = 0; i < ARRAY_SIZE(clk); ++i)
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clk[i] = ERR_PTR(-ENOENT);
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base = of_iomap(np, 0);
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if (!base) {
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pr_warn("Failed to map address range for efm32gg,cmu node\n");
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return;
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}
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clk[clk_HFXO] = clk_register_fixed_rate(NULL, "HFXO", NULL,
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CLK_IS_ROOT, 48000000);
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clk[clk_HFPERCLKUSART0] = clk_register_gate(NULL, "HFPERCLK.USART0",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 0, 0, NULL);
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clk[clk_HFPERCLKUSART1] = clk_register_gate(NULL, "HFPERCLK.USART1",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 1, 0, NULL);
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clk[clk_HFPERCLKUSART2] = clk_register_gate(NULL, "HFPERCLK.USART2",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 2, 0, NULL);
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clk[clk_HFPERCLKUART0] = clk_register_gate(NULL, "HFPERCLK.UART0",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 3, 0, NULL);
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clk[clk_HFPERCLKUART1] = clk_register_gate(NULL, "HFPERCLK.UART1",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 4, 0, NULL);
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clk[clk_HFPERCLKTIMER0] = clk_register_gate(NULL, "HFPERCLK.TIMER0",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 5, 0, NULL);
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clk[clk_HFPERCLKTIMER1] = clk_register_gate(NULL, "HFPERCLK.TIMER1",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 6, 0, NULL);
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clk[clk_HFPERCLKTIMER2] = clk_register_gate(NULL, "HFPERCLK.TIMER2",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 7, 0, NULL);
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clk[clk_HFPERCLKTIMER3] = clk_register_gate(NULL, "HFPERCLK.TIMER3",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 8, 0, NULL);
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clk[clk_HFPERCLKACMP0] = clk_register_gate(NULL, "HFPERCLK.ACMP0",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 9, 0, NULL);
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clk[clk_HFPERCLKACMP1] = clk_register_gate(NULL, "HFPERCLK.ACMP1",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 10, 0, NULL);
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clk[clk_HFPERCLKI2C0] = clk_register_gate(NULL, "HFPERCLK.I2C0",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 11, 0, NULL);
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clk[clk_HFPERCLKI2C1] = clk_register_gate(NULL, "HFPERCLK.I2C1",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 12, 0, NULL);
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clk[clk_HFPERCLKGPIO] = clk_register_gate(NULL, "HFPERCLK.GPIO",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 13, 0, NULL);
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clk[clk_HFPERCLKVCMP] = clk_register_gate(NULL, "HFPERCLK.VCMP",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 14, 0, NULL);
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clk[clk_HFPERCLKPRS] = clk_register_gate(NULL, "HFPERCLK.PRS",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 15, 0, NULL);
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clk[clk_HFPERCLKADC0] = clk_register_gate(NULL, "HFPERCLK.ADC0",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 16, 0, NULL);
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clk[clk_HFPERCLKDAC0] = clk_register_gate(NULL, "HFPERCLK.DAC0",
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"HFXO", 0, base + CMU_HFPERCLKEN0, 17, 0, NULL);
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of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
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}
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CLK_OF_DECLARE(efm32ggcmu, "efm32gg,cmu", efm32gg_cmu_init);
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