forked from luck/tmp_suning_uos_patched
6f7a251a25
Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller has a programming interface similiar to the the FPGA northbridge used on Loongson 2E. The main differences between Loongson 2E and Loongson 2F include: 1. Loongson 2F has an extra address window configuration module, which is used to map CPU address space to DDR or PCI address space, or map the PCI-DMA address space to DDR or LIO address space. 2. Loongson 2F supports 8 levels of software configurable CPu frequency which can be configured in the LOONGSON_CHIPCFG0 register. The coming cpufreq and standby support are based on this feature. Loongson.h abstracts the modules and corresponding methods are abstracted. Add other Loongson-2F-specific source code including gcc 4.4 support, PCI memory space, PCI IO space, DMA address. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
73 lines
1.7 KiB
C
73 lines
1.7 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2006, 07 Ralf Baechle <ralf@linux-mips.org>
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* Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
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* Author: Fuxin Zhang, zhangfx@lemote.com
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*
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*/
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#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H
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#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H
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struct device;
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static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
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size_t size)
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{
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return virt_to_phys(addr) | 0x80000000;
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}
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static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
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struct page *page)
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{
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return page_to_phys(page) | 0x80000000;
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}
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static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
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dma_addr_t dma_addr)
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{
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#if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT)
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return (dma_addr > 0x8fffffff) ? dma_addr : (dma_addr & 0x0fffffff);
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#else
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return dma_addr & 0x7fffffff;
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#endif
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}
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static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction direction)
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{
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}
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static inline int plat_dma_supported(struct device *dev, u64 mask)
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{
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/*
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* we fall back to GFP_DMA when the mask isn't all 1s,
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* so we can't guarantee allocations that must be
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* within a tighter range than GFP_DMA..
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*/
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if (mask < DMA_BIT_MASK(24))
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return 0;
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return 1;
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}
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static inline void plat_extra_sync_for_device(struct device *dev)
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{
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return;
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}
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static inline int plat_dma_mapping_error(struct device *dev,
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dma_addr_t dma_addr)
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{
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return 0;
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}
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static inline int plat_device_is_coherent(struct device *dev)
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{
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return 0;
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}
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#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */
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