forked from luck/tmp_suning_uos_patched
3229a6d865
Move the Lantiq device-trees to arch/mips/boot/dts/ and update the Makefiles accordingly. There is currently only a single Lantiq device-tree (EASY50712), and it's required to be built into the kernel, so select BUILTIN_DTB for it. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: David Daney <david.daney@cavium.com> Cc: John Crispin <blogic@openwrt.org> Cc: Jayachandran C <jchandra@broadcom.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7559/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
106 lines
2.1 KiB
Plaintext
106 lines
2.1 KiB
Plaintext
/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,xway", "lantiq,danube";
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cpus {
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cpu@0 {
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compatible = "mips,mips24Kc";
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};
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};
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biu@1F800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,biu", "simple-bus";
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reg = <0x1F800000 0x800000>;
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ranges = <0x0 0x1F800000 0x7FFFFF>;
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icu0: icu@80200 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,icu";
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reg = <0x80200 0x120>;
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};
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watchdog@803F0 {
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compatible = "lantiq,wdt";
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reg = <0x803F0 0x10>;
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};
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};
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sram@1F000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,sram";
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reg = <0x1F000000 0x800000>;
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ranges = <0x0 0x1F000000 0x7FFFFF>;
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eiu0: eiu@101000 {
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#interrupt-cells = <1>;
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interrupt-controller;
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interrupt-parent;
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compatible = "lantiq,eiu-xway";
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reg = <0x101000 0x1000>;
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};
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pmu0: pmu@102000 {
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compatible = "lantiq,pmu-xway";
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reg = <0x102000 0x1000>;
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};
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cgu0: cgu@103000 {
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compatible = "lantiq,cgu-xway";
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reg = <0x103000 0x1000>;
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#clock-cells = <1>;
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};
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rcu0: rcu@203000 {
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compatible = "lantiq,rcu-xway";
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reg = <0x203000 0x1000>;
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};
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};
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fpi@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xEEFFFFF>;
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reg = <0x10000000 0xEF00000>;
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gptu@E100A00 {
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compatible = "lantiq,gptu-xway";
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reg = <0xE100A00 0x100>;
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};
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serial@E100C00 {
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compatible = "lantiq,asc";
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reg = <0xE100C00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <112 113 114>;
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};
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dma0: dma@E104100 {
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compatible = "lantiq,dma-xway";
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reg = <0xE104100 0x800>;
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};
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ebu0: ebu@E105300 {
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compatible = "lantiq,ebu-xway";
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reg = <0xE105300 0x100>;
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};
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pci0: pci@E105400 {
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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compatible = "lantiq,pci-xway";
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bus-range = <0x0 0x0>;
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ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
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0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
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reg = <0x7000000 0x8000 /* config space */
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0xE105400 0x400>; /* pci bridge */
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};
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};
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};
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