forked from luck/tmp_suning_uos_patched
ce3609f934
Implement the new smp_mb__* ops as per the old ones. Signed-off-by: Peter Zijlstra <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/n/tip-euuabnf5a3u23fy4fq8m3jcg@git.kernel.org Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: Chen Gang <gang.chen@asianux.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
114 lines
3.2 KiB
C
114 lines
3.2 KiB
C
/*
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* Copyright 2011 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* Do not include directly; use <linux/atomic.h>.
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*/
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#ifndef _ASM_TILE_ATOMIC_64_H
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#define _ASM_TILE_ATOMIC_64_H
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#ifndef __ASSEMBLY__
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#include <asm/barrier.h>
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#include <arch/spr_def.h>
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/* First, the 32-bit atomic ops that are "real" on our 64-bit platform. */
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#define atomic_set(v, i) ((v)->counter = (i))
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/*
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* The smp_mb() operations throughout are to support the fact that
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* Linux requires memory barriers before and after the operation,
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* on any routine which updates memory and returns a value.
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*/
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static inline void atomic_add(int i, atomic_t *v)
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{
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__insn_fetchadd4((void *)&v->counter, i);
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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int val;
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smp_mb(); /* barrier for proper semantics */
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val = __insn_fetchadd4((void *)&v->counter, i) + i;
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barrier(); /* the "+ i" above will wait on memory */
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return val;
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}
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static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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{
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int guess, oldval = v->counter;
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do {
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if (oldval == u)
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break;
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guess = oldval;
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oldval = cmpxchg(&v->counter, guess, guess + a);
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} while (guess != oldval);
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return oldval;
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}
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/* Now the true 64-bit operations. */
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#define ATOMIC64_INIT(i) { (i) }
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#define atomic64_read(v) ((v)->counter)
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#define atomic64_set(v, i) ((v)->counter = (i))
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static inline void atomic64_add(long i, atomic64_t *v)
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{
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__insn_fetchadd((void *)&v->counter, i);
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}
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static inline long atomic64_add_return(long i, atomic64_t *v)
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{
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int val;
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smp_mb(); /* barrier for proper semantics */
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val = __insn_fetchadd((void *)&v->counter, i) + i;
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barrier(); /* the "+ i" above will wait on memory */
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return val;
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}
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static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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long guess, oldval = v->counter;
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do {
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if (oldval == u)
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break;
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guess = oldval;
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oldval = cmpxchg(&v->counter, guess, guess + a);
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} while (guess != oldval);
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return oldval != u;
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}
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#define atomic64_sub_return(i, v) atomic64_add_return(-(i), (v))
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#define atomic64_sub(i, v) atomic64_add(-(i), (v))
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#define atomic64_inc_return(v) atomic64_add_return(1, (v))
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#define atomic64_dec_return(v) atomic64_sub_return(1, (v))
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#define atomic64_inc(v) atomic64_add(1, (v))
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#define atomic64_dec(v) atomic64_sub(1, (v))
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#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
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#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
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#define atomic64_sub_and_test(i, v) (atomic64_sub_return((i), (v)) == 0)
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#define atomic64_add_negative(i, v) (atomic64_add_return((i), (v)) < 0)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
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/* Define this to indicate that cmpxchg is an efficient operation. */
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#define __HAVE_ARCH_CMPXCHG
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_TILE_ATOMIC_64_H */
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