forked from luck/tmp_suning_uos_patched
b552c7e8bc
Simple 7785 placeholders to start hooking up other bits of code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
295 lines
6.6 KiB
C
295 lines
6.6 KiB
C
/*
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* include/asm-sh/processor.h
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*
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* Copyright (C) 1999, 2000 Niibe Yutaka
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* Copyright (C) 2002, 2003 Paul Mundt
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*/
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#ifndef __ASM_SH_PROCESSOR_H
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#define __ASM_SH_PROCESSOR_H
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <asm/page.h>
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#include <asm/types.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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#include <asm/cpu-features.h>
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
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/* Core Processor Version Register */
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#define CCN_PVR 0xff000030
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#define CCN_CVR 0xff000040
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#define CCN_PRR 0xff000044
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/*
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* CPU type and hardware bug flags. Kept separately for each CPU.
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*
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* Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
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* in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
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* for parsing the subtype in get_cpu_subtype().
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*/
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enum cpu_type {
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/* SH-2 types */
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CPU_SH7604, CPU_SH7619,
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/* SH-2A types */
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CPU_SH7206,
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/* SH-3 types */
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CPU_SH7705, CPU_SH7706, CPU_SH7707,
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CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
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CPU_SH7709, CPU_SH7709A, CPU_SH7710,
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CPU_SH7729, CPU_SH7300,
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/* SH-4 types */
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CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
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CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
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/* SH-4A types */
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CPU_SH73180, CPU_SH7343, CPU_SH7770, CPU_SH7780, CPU_SH7781,
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CPU_SH7785,
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/* Unknown subtype */
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CPU_SH_NONE
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};
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struct sh_cpuinfo {
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unsigned int type;
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unsigned long loops_per_jiffy;
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struct cache_info icache; /* Primary I-cache */
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struct cache_info dcache; /* Primary D-cache */
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struct cache_info scache; /* Secondary cache */
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unsigned long flags;
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} __attribute__ ((aligned(SMP_CACHE_BYTES)));
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extern struct sh_cpuinfo boot_cpu_data;
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#ifdef CONFIG_SMP
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extern struct sh_cpuinfo cpu_data[];
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#define current_cpu_data cpu_data[smp_processor_id()]
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#else
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#define cpu_data (&boot_cpu_data)
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#define current_cpu_data boot_cpu_data
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#endif
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/*
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* User space process size: 2GB.
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*
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* Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
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*/
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#define TASK_SIZE 0x7c000000UL
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/* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
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/*
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* Bit of SR register
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*
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* FD-bit:
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* When it's set, it means the processor doesn't have right to use FPU,
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* and it results exception when the floating operation is executed.
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*
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* IMASK-bit:
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* Interrupt level mask
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*/
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#define SR_FD 0x00008000
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#define SR_DSP 0x00001000
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#define SR_IMASK 0x000000f0
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/*
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* FPU structure and data
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*/
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struct sh_fpu_hard_struct {
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unsigned long fp_regs[16];
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unsigned long xfp_regs[16];
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unsigned long fpscr;
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unsigned long fpul;
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long status; /* software status information */
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};
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/* Dummy fpu emulator */
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struct sh_fpu_soft_struct {
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unsigned long fp_regs[16];
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unsigned long xfp_regs[16];
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unsigned long fpscr;
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unsigned long fpul;
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unsigned char lookahead;
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unsigned long entry_pc;
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};
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union sh_fpu_union {
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struct sh_fpu_hard_struct hard;
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struct sh_fpu_soft_struct soft;
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};
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struct thread_struct {
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unsigned long sp;
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unsigned long pc;
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unsigned long trap_no, error_code;
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unsigned long address;
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/* Hardware debugging registers may come here */
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unsigned long ubc_pc;
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/* floating point info */
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union sh_fpu_union fpu;
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};
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typedef struct {
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unsigned long seg;
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} mm_segment_t;
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/* Count of active tasks with UBC settings */
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extern int ubc_usercnt;
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#define INIT_THREAD { \
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sizeof(init_stack) + (long) &init_stack, /* sp */ \
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0, /* pc */ \
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0, 0, \
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0, \
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0, \
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{{{0,}},} /* fpu state */ \
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}
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/*
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* Do necessary setup to start up a newly executed thread.
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*/
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#define start_thread(regs, new_pc, new_sp) \
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set_fs(USER_DS); \
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regs->pr = 0; \
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regs->sr = SR_FD; /* User mode. */ \
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regs->pc = new_pc; \
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regs->regs[15] = new_sp
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/* Forward declaration, a strange C thing */
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struct task_struct;
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struct mm_struct;
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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/* Prepare to copy thread state - unlazy all lazy status */
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#define prepare_to_copy(tsk) do { } while (0)
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/*
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* create a kernel thread without removing it from tasklists
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*/
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extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
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/* Copy and release all segment info associated with a VM */
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#define copy_segments(p, mm) do { } while(0)
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#define release_segments(mm) do { } while(0)
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/*
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* FPU lazy state save handling.
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*/
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static __inline__ void disable_fpu(void)
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{
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unsigned long __dummy;
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/* Set FD flag in SR */
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__asm__ __volatile__("stc sr, %0\n\t"
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"or %1, %0\n\t"
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"ldc %0, sr"
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: "=&r" (__dummy)
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: "r" (SR_FD));
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}
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static __inline__ void enable_fpu(void)
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{
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unsigned long __dummy;
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/* Clear out FD flag in SR */
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__asm__ __volatile__("stc sr, %0\n\t"
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"and %1, %0\n\t"
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"ldc %0, sr"
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: "=&r" (__dummy)
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: "r" (~SR_FD));
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}
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static __inline__ void release_fpu(struct pt_regs *regs)
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{
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regs->sr |= SR_FD;
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}
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static __inline__ void grab_fpu(struct pt_regs *regs)
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{
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regs->sr &= ~SR_FD;
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}
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#ifdef CONFIG_CPU_SH4
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extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
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#else
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#define save_fpu(tsk) do { } while (0)
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#endif
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#define unlazy_fpu(tsk, regs) do { \
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if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
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save_fpu(tsk, regs); \
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} \
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} while (0)
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#define clear_fpu(tsk, regs) do { \
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if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
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clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
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release_fpu(regs); \
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} \
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} while (0)
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/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
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#define FPSCR_INIT 0x00080000
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#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
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#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
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/*
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* Return saved PC of a blocked thread.
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*/
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#define thread_saved_pc(tsk) (tsk->thread.pc)
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void show_trace(struct task_struct *tsk, unsigned long *sp,
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struct pt_regs *regs);
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extern unsigned long get_wchan(struct task_struct *p);
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#define KSTK_EIP(tsk) ((tsk)->thread.pc)
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#define KSTK_ESP(tsk) ((tsk)->thread.sp)
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#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
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#define cpu_relax() barrier()
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#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
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defined(CONFIG_CPU_SH4)
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#define PREFETCH_STRIDE L1_CACHE_BYTES
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#define ARCH_HAS_PREFETCH
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#define ARCH_HAS_PREFETCHW
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static inline void prefetch(void *x)
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{
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__asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
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}
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#define prefetchw(x) prefetch(x)
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#endif
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#ifdef CONFIG_VSYSCALL
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extern int vsyscall_init(void);
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#else
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#define vsyscall_init() do { } while (0)
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH_PROCESSOR_H */
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