forked from luck/tmp_suning_uos_patched
9693a85378
This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
100 lines
2.5 KiB
C
100 lines
2.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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*/
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#ifndef _ASM_PTRACE_H
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#define _ASM_PTRACE_H
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/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
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#define FPR_BASE 32
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#define PC 64
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#define CAUSE 65
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#define BADVADDR 66
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#define MMHI 67
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#define MMLO 68
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#define FPC_CSR 69
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#define FPC_EIR 70
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#define DSP_BASE 71 /* 3 more hi / lo register pairs */
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#define DSP_CONTROL 77
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#define ACX 78
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/*
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* This struct defines the way the registers are stored on the stack during a
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* system call/exception. As usual the registers k0/k1 aren't being saved.
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*/
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struct pt_regs {
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#ifdef CONFIG_32BIT
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/* Pad bytes for argument save space on the stack. */
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unsigned long pad0[6];
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#endif
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/* Saved main processor registers. */
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unsigned long regs[32];
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/* Saved special registers. */
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unsigned long cp0_status;
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unsigned long hi;
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unsigned long lo;
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#ifdef CONFIG_CPU_HAS_SMARTMIPS
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unsigned long acx;
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#endif
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unsigned long cp0_badvaddr;
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unsigned long cp0_cause;
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unsigned long cp0_epc;
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#ifdef CONFIG_MIPS_MT_SMTC
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unsigned long cp0_tcstatus;
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#endif /* CONFIG_MIPS_MT_SMTC */
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} __attribute__ ((aligned (8)));
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/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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/* #define PTRACE_GETFPXREGS 18 */
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/* #define PTRACE_SETFPXREGS 19 */
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#define PTRACE_OLDSETOPTIONS 21
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#define PTRACE_GET_THREAD_AREA 25
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#define PTRACE_SET_THREAD_AREA 26
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/* Calls to trace a 64bit program from a 32bit program. */
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#define PTRACE_PEEKTEXT_3264 0xc0
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#define PTRACE_PEEKDATA_3264 0xc1
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#define PTRACE_POKETEXT_3264 0xc2
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#define PTRACE_POKEDATA_3264 0xc3
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#define PTRACE_GET_THREAD_AREA_3264 0xc4
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#ifdef __KERNEL__
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#include <linux/linkage.h>
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#include <asm/isadep.h>
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/*
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* Does the process account for user or for system time?
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*/
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#define user_mode(regs) (((regs)->cp0_status & KU_MASK) == KU_USER)
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#define instruction_pointer(regs) ((regs)->cp0_epc)
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#define profile_pc(regs) instruction_pointer(regs)
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extern asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit);
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extern NORET_TYPE void die(const char *, struct pt_regs *);
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static inline void die_if_kernel(const char *str, struct pt_regs *regs)
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{
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if (unlikely(!user_mode(regs)))
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die(str, regs);
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}
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#endif
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#endif /* _ASM_PTRACE_H */
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