forked from luck/tmp_suning_uos_patched
fae2211697
To support memory keys, we moved the hash pte slot information to the
second half of the page table. This was ok with PTE entries at level
4 (PTE page) and level 3 (PMD). We already allocate larger page table
pages at those levels to accomodate extra details. For level 4 we
already have the extra space which was used to track 4k hash page
table entry details and at level 3 the extra space was allocated to
track the THP details.
With hugetlbfs PTE, we used this extra space at the PMD level to store
the slot details. But we also support hugetlbfs PTE at PUD level for
16GB pages and PUD level page didn't allocate extra space. This
resulted in memory corruption.
Fix this by allocating extra space at PUD level when HUGETLB is
enabled.
Fixes: bf9a95f9a6 ("powerpc: Free up four 64K PTE bits in 64K backed HPTE pages")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Reviewed-by: Ram Pai <linuxram@us.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
106 lines
3.2 KiB
C
106 lines
3.2 KiB
C
/*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* Dave Engebretsen <engebret@us.ibm.com>
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* Rework for PPC64 port.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#undef DEBUG
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#include <linux/string.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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static void pgd_ctor(void *addr)
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{
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memset(addr, 0, PGD_TABLE_SIZE);
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}
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static void pud_ctor(void *addr)
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{
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memset(addr, 0, PUD_TABLE_SIZE);
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}
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static void pmd_ctor(void *addr)
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{
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memset(addr, 0, PMD_TABLE_SIZE);
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}
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struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE];
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EXPORT_SYMBOL_GPL(pgtable_cache); /* used by kvm_hv module */
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/*
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* Create a kmem_cache() for pagetables. This is not used for PTE
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* pages - they're linked to struct page, come from the normal free
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* pages pool and have a different entry size (see real_pte_t) to
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* everything else. Caches created by this function are used for all
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* the higher level pagetables, and for hugepage pagetables.
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*/
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void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
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{
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char *name;
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unsigned long table_size = sizeof(void *) << shift;
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unsigned long align = table_size;
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/* When batching pgtable pointers for RCU freeing, we store
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* the index size in the low bits. Table alignment must be
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* big enough to fit it.
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*
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* Likewise, hugeapge pagetable pointers contain a (different)
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* shift value in the low bits. All tables must be aligned so
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* as to leave enough 0 bits in the address to contain it. */
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unsigned long minalign = max(MAX_PGTABLE_INDEX_SIZE + 1,
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HUGEPD_SHIFT_MASK + 1);
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struct kmem_cache *new;
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/* It would be nice if this was a BUILD_BUG_ON(), but at the
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* moment, gcc doesn't seem to recognize is_power_of_2 as a
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* constant expression, so so much for that. */
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BUG_ON(!is_power_of_2(minalign));
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BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE));
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if (PGT_CACHE(shift))
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return; /* Already have a cache of this size */
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align = max_t(unsigned long, align, minalign);
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name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
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new = kmem_cache_create(name, table_size, align, 0, ctor);
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if (!new)
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panic("Could not allocate pgtable cache for order %d", shift);
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kfree(name);
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pgtable_cache[shift - 1] = new;
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pr_debug("Allocated pgtable cache for order %d\n", shift);
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}
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EXPORT_SYMBOL_GPL(pgtable_cache_add); /* used by kvm_hv module */
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void pgtable_cache_init(void)
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{
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pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor);
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if (PMD_CACHE_INDEX && !PGT_CACHE(PMD_CACHE_INDEX))
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pgtable_cache_add(PMD_CACHE_INDEX, pmd_ctor);
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/*
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* In all current configs, when the PUD index exists it's the
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* same size as either the pgd or pmd index except with THP enabled
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* on book3s 64
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*/
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if (PUD_CACHE_INDEX && !PGT_CACHE(PUD_CACHE_INDEX))
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pgtable_cache_add(PUD_CACHE_INDEX, pud_ctor);
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}
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