forked from luck/tmp_suning_uos_patched
e081685c1b
MMIO log traces obtained using the Broadcom wl hybrid driver show that the RETRY_TIMEOUT register (0x41) in PCI configuration space is cleared if non-zero. Similar code found in other drivers such as ipw2100 show this operation is needed to keep PCI Tx retries from interfering with C3 CPU state. There are no known cases where omission of this code has caused a problem, but this patch is offered just in case such a situation occurs. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
123 lines
2.7 KiB
C
123 lines
2.7 KiB
C
/*
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* Sonics Silicon Backplane
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* PCI Hostdevice wrapper
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*
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* Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
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* Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
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* Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
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* Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
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* Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/ssb/ssb.h>
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#ifdef CONFIG_PM
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static int ssb_pcihost_suspend(struct pci_dev *dev, pm_message_t state)
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{
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struct ssb_bus *ssb = pci_get_drvdata(dev);
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int err;
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err = ssb_bus_suspend(ssb);
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if (err)
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return err;
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pci_save_state(dev);
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pci_disable_device(dev);
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pci_set_power_state(dev, pci_choose_state(dev, state));
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return 0;
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}
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static int ssb_pcihost_resume(struct pci_dev *dev)
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{
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struct ssb_bus *ssb = pci_get_drvdata(dev);
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int err;
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pci_set_power_state(dev, 0);
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err = pci_enable_device(dev);
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if (err)
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return err;
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pci_restore_state(dev);
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err = ssb_bus_resume(ssb);
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if (err)
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return err;
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return 0;
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}
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#else /* CONFIG_PM */
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# define ssb_pcihost_suspend NULL
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# define ssb_pcihost_resume NULL
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#endif /* CONFIG_PM */
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static int ssb_pcihost_probe(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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struct ssb_bus *ssb;
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int err = -ENOMEM;
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const char *name;
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u32 val;
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ssb = kzalloc(sizeof(*ssb), GFP_KERNEL);
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if (!ssb)
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goto out;
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err = pci_enable_device(dev);
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if (err)
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goto err_kfree_ssb;
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name = dev_name(&dev->dev);
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if (dev->driver && dev->driver->name)
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name = dev->driver->name;
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err = pci_request_regions(dev, name);
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if (err)
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goto err_pci_disable;
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pci_set_master(dev);
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/* Disable the RETRY_TIMEOUT register (0x41) to keep
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* PCI Tx retries from interfering with C3 CPU state */
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pci_read_config_dword(dev, 0x40, &val);
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if ((val & 0x0000ff00) != 0)
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pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
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err = ssb_bus_pcibus_register(ssb, dev);
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if (err)
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goto err_pci_release_regions;
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pci_set_drvdata(dev, ssb);
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out:
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return err;
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err_pci_release_regions:
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pci_release_regions(dev);
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err_pci_disable:
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pci_disable_device(dev);
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err_kfree_ssb:
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kfree(ssb);
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return err;
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}
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static void ssb_pcihost_remove(struct pci_dev *dev)
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{
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struct ssb_bus *ssb = pci_get_drvdata(dev);
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ssb_bus_unregister(ssb);
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pci_release_regions(dev);
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pci_disable_device(dev);
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kfree(ssb);
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pci_set_drvdata(dev, NULL);
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}
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int ssb_pcihost_register(struct pci_driver *driver)
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{
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driver->probe = ssb_pcihost_probe;
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driver->remove = ssb_pcihost_remove;
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driver->suspend = ssb_pcihost_suspend;
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driver->resume = ssb_pcihost_resume;
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return pci_register_driver(driver);
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}
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EXPORT_SYMBOL(ssb_pcihost_register);
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