forked from luck/tmp_suning_uos_patched
bc3ec75de5
All the cache maintainance is already stubbed out when not enabled, but merging the two allows us to nicely handle the case where cache maintainance is required for some devices, but not others. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Burton <paul.burton@mips.com> # MIPS parts
52 lines
717 B
Plaintext
52 lines
717 B
Plaintext
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config HAS_DMA
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bool
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depends on !NO_DMA
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default y
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config NEED_SG_DMA_LENGTH
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bool
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config NEED_DMA_MAP_STATE
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bool
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config ARCH_DMA_ADDR_T_64BIT
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def_bool 64BIT || PHYS_ADDR_T_64BIT
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config ARCH_HAS_DMA_COHERENCE_H
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bool
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config HAVE_GENERIC_DMA_COHERENT
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bool
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config ARCH_HAS_SYNC_DMA_FOR_DEVICE
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bool
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config ARCH_HAS_SYNC_DMA_FOR_CPU
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bool
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select NEED_DMA_MAP_STATE
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config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
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bool
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config DMA_DIRECT_OPS
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bool
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depends on HAS_DMA
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config DMA_NONCOHERENT_MMAP
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bool
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depends on DMA_DIRECT_OPS
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config DMA_NONCOHERENT_CACHE_SYNC
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bool
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depends on DMA_DIRECT_OPS
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config DMA_VIRT_OPS
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bool
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depends on HAS_DMA
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config SWIOTLB
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bool
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select DMA_DIRECT_OPS
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select NEED_DMA_MAP_STATE
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