forked from luck/tmp_suning_uos_patched
002dff36ac
Now that 'smp_read_barrier_depends()' has gone the way of the Norwegian Blue, drop the inclusion of <asm/barrier.h> in 'asm-generic/rwonce.h'. This requires fixups to some architecture vdso headers which were previously relying on 'asm/barrier.h' coming in via 'linux/compiler.h'. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Will Deacon <will@kernel.org>
91 lines
2.9 KiB
C
91 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Prevent the compiler from merging or refetching reads or writes. The
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* compiler is also forbidden from reordering successive instances of
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* READ_ONCE and WRITE_ONCE, but only when the compiler is aware of some
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* particular ordering. One way to make the compiler aware of ordering is to
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* put the two invocations of READ_ONCE or WRITE_ONCE in different C
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* statements.
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*
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* These two macros will also work on aggregate data types like structs or
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* unions.
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*
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* Their two major use cases are: (1) Mediating communication between
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* process-level code and irq/NMI handlers, all running on the same CPU,
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* and (2) Ensuring that the compiler does not fold, spindle, or otherwise
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* mutilate accesses that either do not require ordering or that interact
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* with an explicit memory barrier or atomic instruction that provides the
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* required ordering.
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*/
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#ifndef __ASM_GENERIC_RWONCE_H
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#define __ASM_GENERIC_RWONCE_H
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#ifndef __ASSEMBLY__
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#include <linux/compiler_types.h>
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#include <linux/kasan-checks.h>
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#include <linux/kcsan-checks.h>
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/*
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* Yes, this permits 64-bit accesses on 32-bit architectures. These will
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* actually be atomic in some cases (namely Armv7 + LPAE), but for others we
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* rely on the access being split into 2x32-bit accesses for a 32-bit quantity
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* (e.g. a virtual address) and a strong prevailing wind.
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*/
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#define compiletime_assert_rwonce_type(t) \
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compiletime_assert(__native_word(t) || sizeof(t) == sizeof(long long), \
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"Unsupported access size for {READ,WRITE}_ONCE().")
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/*
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* Use __READ_ONCE() instead of READ_ONCE() if you do not require any
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* atomicity. Note that this may result in tears!
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*/
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#ifndef __READ_ONCE
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#define __READ_ONCE(x) (*(const volatile __unqual_scalar_typeof(x) *)&(x))
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#endif
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#define READ_ONCE(x) \
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({ \
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compiletime_assert_rwonce_type(x); \
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__READ_ONCE(x); \
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})
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#define __WRITE_ONCE(x, val) \
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do { \
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*(volatile typeof(x) *)&(x) = (val); \
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} while (0)
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#define WRITE_ONCE(x, val) \
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do { \
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compiletime_assert_rwonce_type(x); \
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__WRITE_ONCE(x, val); \
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} while (0)
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static __no_sanitize_or_inline
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unsigned long __read_once_word_nocheck(const void *addr)
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{
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return __READ_ONCE(*(unsigned long *)addr);
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}
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/*
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* Use READ_ONCE_NOCHECK() instead of READ_ONCE() if you need to load a
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* word from memory atomically but without telling KASAN/KCSAN. This is
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* usually used by unwinding code when walking the stack of a running process.
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*/
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#define READ_ONCE_NOCHECK(x) \
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({ \
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compiletime_assert(sizeof(x) == sizeof(unsigned long), \
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"Unsupported access size for READ_ONCE_NOCHECK()."); \
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(typeof(x))__read_once_word_nocheck(&(x)); \
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})
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static __no_kasan_or_inline
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unsigned long read_word_at_a_time(const void *addr)
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{
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kasan_check_read(addr, 1);
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return *(unsigned long *)addr;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_GENERIC_RWONCE_H */
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