Roger Quadros c65176fd49 arm64: dts: ti: k3-j721e: Rename mux header and update macro names ... We intend to use one header file for SERDES MUX for all TI SoCs so rename the header file. The exsting macros are too generic. Prefix them with SoC name. While at that, add the missing configurations for completeness. Fixes: b766e3b0d5 ("arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux") Reported-by: Peter Rosin <peda@axentia.se> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20200918165930.2031-1-rogerq@ti.com		2020-09-21 07:17:20 -05:00
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arm	dt-bindings: arm: Adds CoreSight CTI hardware definitions	2020-03-21 11:32:19 +01:00
bus	dt-bindings: bus: ti-sysc: Add support for PRUSS SYSC type	2020-03-04 07:52:50 -08:00
clk	dt: Add additional option bindings for IDT VersaClock	2020-06-22 19:04:58 -07:00
clock	Here's some more updates that missed the last pull request because I	2020-08-12 12:19:49 -07:00
display	media: dt-bindings: display: add sdtv-standards defines	2020-03-12 16:29:29 +01:00
dma	dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA	2020-07-17 11:37:59 +05:30
firmware/imx	dt-bindings: firmware: imx: Add more system controls and PM clock types	2020-05-13 16:19:39 +08:00
gce	dt-binding: gce: add gce header file for mt6779	2020-08-03 23:56:37 -05:00
gpio	pinctrl: add compatible for Amlogic Meson A1 pin controller	2019-11-04 16:31:34 +01:00
i2c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 498	2019-06-19 17:09:53 +02:00
iio	Merge branch 'ib-5.8-jz47xx-ts' into HEAD	2020-07-22 14:36:31 +01:00
input	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	2019-05-30 11:26:41 -07:00
interconnect	interconnect: imx: Add platform driver for imx8mn	2020-04-28 20:03:02 +03:00
interrupt-controller	dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller	2020-01-20 19:10:03 +00:00
leds	leds: add RGB color option, as that is different from multicolor.	2020-08-03 13:26:15 +02:00
mailbox	dt-bindings: mailbox: Add devicetree binding for Qcom IPCC	2020-05-30 18:10:27 -05:00
media	media: partial revert of "[media] tvp5150: add HW input connectors support"	2020-03-12 16:35:59 +01:00
memory	dt-bindings: mediatek: Add bindings for MT6779	2020-07-10 16:13:10 +02:00
mfd	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
mips	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
mux	arm64: dts: ti: k3-j721e: Rename mux header and update macro names	2020-09-21 07:17:20 -05:00
net	dt-bindings: net: dp83869: Add TI dp83869 phy	2019-11-14 17:42:43 -08:00
phy	dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY	2020-06-29 18:48:00 +05:30
pinctrl	This is the bulk of the pin control changes for the v5.9	2020-08-09 12:52:28 -07:00
pmu	include: dt-bindings: add Performance Monitoring Unit for Exynos	2019-11-06 12:03:59 +09:00
power	Qualcomm ARM64 DT additional updates for 5.9	2020-07-31 10:41:56 +02:00
pwm
regulator	Merge series "regulator: mt6397: Implement of_map_mode regulator_desc function" from Anand K Mistry <amistry@google.com>:	2020-07-02 16:45:49 +01:00
reset	Here's some more updates that missed the last pull request because I	2020-08-12 12:19:49 -07:00
reset-controller	dt-bindings: mediatek: mt2712: Add #reset-cells	2020-01-27 15:55:48 +01:00
soc	dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock	2020-02-17 10:09:19 +01:00
sound	ASoC: dt-bindings: q6asm: Add Q6ASM_DAI_{TX_RX, TX, RX} defines	2020-07-27 14:21:09 +01:00
spmi	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
thermal	thermal: exynos: Rename Samsung and Exynos to lowercase	2020-01-27 10:24:32 +01:00
usb