forked from luck/tmp_suning_uos_patched
733cc21831
This patch is based on powerpc patch
64f1650247
We did some cleanups and removed powerpc parts.
There is one new debug early listing function too.
Exclude function is only in Debug options.
We tested in on custom board.
Signed-off-by: Michal Simek <monstr@monstr.eu>
178 lines
5.0 KiB
C
178 lines
5.0 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Based on powerpc version
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*/
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#ifndef __ASM_MICROBLAZE_PCI_H
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#define __ASM_MICROBLAZE_PCI_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/dma-mapping.h>
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#include <linux/pci.h>
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#include <asm/scatterlist.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/pci-bridge.h>
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x10000000
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struct pci_dev;
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/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
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#define IOBASE_BRIDGE_NUMBER 0
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#define IOBASE_MEMORY 1
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#define IOBASE_IO 2
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#define IOBASE_ISA_IO 3
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#define IOBASE_ISA_MEM 4
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#define pcibios_scan_all_fns(a, b) 0
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/*
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* Set this to 1 if you want the kernel to re-assign all PCI
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* bus numbers (don't do that on ppc64 yet !)
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*/
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#define pcibios_assign_all_busses() \
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(pci_has_flag(PCI_REASSIGN_ALL_BUS))
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static inline void pcibios_set_master(struct pci_dev *dev)
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{
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/* No special bus mastering setup handling */
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}
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static inline void pcibios_penalize_isa_irq(int irq, int active)
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{
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/* We don't do dynamic PCI IRQ allocation */
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}
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#ifdef CONFIG_PCI
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extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
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extern struct dma_map_ops *get_pci_dma_ops(void);
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#else /* CONFIG_PCI */
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#define set_pci_dma_ops(d)
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#define get_pci_dma_ops() NULL
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#endif
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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#endif
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extern int pci_domain_nr(struct pci_bus *bus);
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/* Decide whether to display the domain number in /proc */
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extern int pci_proc_domain(struct pci_bus *bus);
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struct vm_area_struct;
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/* Map a range of PCI memory or I/O space for a device into user space */
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int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
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#define HAVE_PCI_MMAP 1
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extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
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size_t count);
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extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
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size_t count);
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extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state);
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#define HAVE_PCI_LEGACY 1
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/* pci_unmap_{page,single} is a nop so... */
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
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#define pci_unmap_addr(PTR, ADDR_NAME) (0)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
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#define pci_unmap_len(PTR, LEN_NAME) (0)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
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/* The PCI address space does equal the physical memory
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* address space (no IOMMU). The IDE and SCSI device layers use
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* this boolean for bounce buffer decisions.
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*/
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#define PCI_DMA_BUS_IS_PHYS (1)
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extern void pcibios_resource_to_bus(struct pci_dev *dev,
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struct pci_bus_region *region,
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struct resource *res);
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extern void pcibios_bus_to_resource(struct pci_dev *dev,
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struct resource *res,
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struct pci_bus_region *region);
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static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
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struct resource *res)
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{
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struct resource *root = NULL;
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if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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return root;
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}
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extern void pcibios_claim_one_bus(struct pci_bus *b);
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extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
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extern void pcibios_resource_survey(void);
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extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
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extern int remove_phb_dynamic(struct pci_controller *phb);
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extern struct pci_dev *of_create_pci_dev(struct device_node *node,
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struct pci_bus *bus, int devfn);
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extern void of_scan_pci_bridge(struct device_node *node,
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struct pci_dev *dev);
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extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
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extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
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extern int pci_read_irq_line(struct pci_dev *dev);
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extern int pci_bus_find_capability(struct pci_bus *bus,
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unsigned int devfn, int cap);
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struct file;
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extern pgprot_t pci_phys_mem_access_prot(struct file *file,
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unsigned long pfn,
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unsigned long size,
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pgprot_t prot);
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#define HAVE_ARCH_PCI_RESOURCE_TO_USER
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extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
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const struct resource *rsrc,
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resource_size_t *start, resource_size_t *end);
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extern void pcibios_setup_bus_devices(struct pci_bus *bus);
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extern void pcibios_setup_bus_self(struct pci_bus *bus);
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/* This part of code was originaly in xilinx-pci.h */
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#ifdef CONFIG_PCI_XILINX
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extern void __init xilinx_pci_init(void);
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#else
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static inline void __init xilinx_pci_init(void) { return; }
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_MICROBLAZE_PCI_H */
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