forked from luck/tmp_suning_uos_patched
c7f409e39e
Enable fast bcm4329 WIFI suspend/resume on Tegra2 board. This patch allows the mach-tegra support to tell the tegra MMC host controller to NOT turn off power for the MMC controller the WIFI part lives behind. Thus bcm4329 firmware doesn't need to be reloaded. Signed-off-by: Venkat Rao <vrao@broadcom.com> Tested-by: Grant Grundler <grundler@chromium.org> Reviewed-by: Olof Johansson <olof@lixom.net> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Chris Ball <cjb@laptop.org>
264 lines
6.4 KiB
C
264 lines
6.4 KiB
C
/*
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* Copyright (C) 2010 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <mach/gpio.h>
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#include <mach/sdhci.h>
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#include "sdhci.h"
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#include "sdhci-pltfm.h"
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static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg)
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{
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u32 val;
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if (unlikely(reg == SDHCI_PRESENT_STATE)) {
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/* Use wp_gpio here instead? */
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val = readl(host->ioaddr + reg);
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return val | SDHCI_WRITE_PROTECT;
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}
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return readl(host->ioaddr + reg);
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}
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static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
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{
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if (unlikely(reg == SDHCI_HOST_VERSION)) {
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/* Erratum: Version register is invalid in HW. */
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return SDHCI_SPEC_200;
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}
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return readw(host->ioaddr + reg);
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}
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static void tegra_sdhci_writel(struct sdhci_host *host, u32 val, int reg)
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{
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/* Seems like we're getting spurious timeout and crc errors, so
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* disable signalling of them. In case of real errors software
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* timers should take care of eventually detecting them.
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*/
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if (unlikely(reg == SDHCI_SIGNAL_ENABLE))
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val &= ~(SDHCI_INT_TIMEOUT|SDHCI_INT_CRC);
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writel(val, host->ioaddr + reg);
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if (unlikely(reg == SDHCI_INT_ENABLE)) {
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/* Erratum: Must enable block gap interrupt detection */
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u8 gap_ctrl = readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL);
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if (val & SDHCI_INT_CARD_INT)
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gap_ctrl |= 0x8;
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else
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gap_ctrl &= ~0x8;
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writeb(gap_ctrl, host->ioaddr + SDHCI_BLOCK_GAP_CONTROL);
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}
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}
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static unsigned int tegra_sdhci_get_ro(struct sdhci_host *sdhci)
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{
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struct platform_device *pdev = to_platform_device(mmc_dev(sdhci->mmc));
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struct tegra_sdhci_platform_data *plat;
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plat = pdev->dev.platform_data;
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if (!gpio_is_valid(plat->wp_gpio))
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return -1;
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return gpio_get_value(plat->wp_gpio);
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}
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static irqreturn_t carddetect_irq(int irq, void *data)
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{
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struct sdhci_host *sdhost = (struct sdhci_host *)data;
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tasklet_schedule(&sdhost->card_tasklet);
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return IRQ_HANDLED;
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};
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static int tegra_sdhci_8bit(struct sdhci_host *host, int bus_width)
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{
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struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
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struct tegra_sdhci_platform_data *plat;
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u32 ctrl;
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plat = pdev->dev.platform_data;
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ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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if (plat->is_8bit && bus_width == MMC_BUS_WIDTH_8) {
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ctrl &= ~SDHCI_CTRL_4BITBUS;
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ctrl |= SDHCI_CTRL_8BITBUS;
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} else {
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ctrl &= ~SDHCI_CTRL_8BITBUS;
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if (bus_width == MMC_BUS_WIDTH_4)
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ctrl |= SDHCI_CTRL_4BITBUS;
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else
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ctrl &= ~SDHCI_CTRL_4BITBUS;
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}
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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return 0;
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}
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static int tegra_sdhci_pltfm_init(struct sdhci_host *host,
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struct sdhci_pltfm_data *pdata)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
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struct tegra_sdhci_platform_data *plat;
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struct clk *clk;
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int rc;
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plat = pdev->dev.platform_data;
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if (plat == NULL) {
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dev_err(mmc_dev(host->mmc), "missing platform data\n");
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return -ENXIO;
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}
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if (gpio_is_valid(plat->power_gpio)) {
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rc = gpio_request(plat->power_gpio, "sdhci_power");
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if (rc) {
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dev_err(mmc_dev(host->mmc),
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"failed to allocate power gpio\n");
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goto out;
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}
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tegra_gpio_enable(plat->power_gpio);
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gpio_direction_output(plat->power_gpio, 1);
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}
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if (gpio_is_valid(plat->cd_gpio)) {
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rc = gpio_request(plat->cd_gpio, "sdhci_cd");
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if (rc) {
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dev_err(mmc_dev(host->mmc),
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"failed to allocate cd gpio\n");
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goto out_power;
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}
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tegra_gpio_enable(plat->cd_gpio);
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gpio_direction_input(plat->cd_gpio);
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rc = request_irq(gpio_to_irq(plat->cd_gpio), carddetect_irq,
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IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
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mmc_hostname(host->mmc), host);
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if (rc) {
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dev_err(mmc_dev(host->mmc), "request irq error\n");
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goto out_cd;
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}
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}
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if (gpio_is_valid(plat->wp_gpio)) {
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rc = gpio_request(plat->wp_gpio, "sdhci_wp");
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if (rc) {
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dev_err(mmc_dev(host->mmc),
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"failed to allocate wp gpio\n");
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goto out_irq;
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}
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tegra_gpio_enable(plat->wp_gpio);
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gpio_direction_input(plat->wp_gpio);
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}
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clk = clk_get(mmc_dev(host->mmc), NULL);
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if (IS_ERR(clk)) {
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dev_err(mmc_dev(host->mmc), "clk err\n");
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rc = PTR_ERR(clk);
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goto out_wp;
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}
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clk_enable(clk);
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pltfm_host->clk = clk;
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host->mmc->pm_caps = plat->pm_flags;
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if (plat->is_8bit)
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host->mmc->caps |= MMC_CAP_8_BIT_DATA;
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return 0;
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out_wp:
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if (gpio_is_valid(plat->wp_gpio)) {
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tegra_gpio_disable(plat->wp_gpio);
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gpio_free(plat->wp_gpio);
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}
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out_irq:
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if (gpio_is_valid(plat->cd_gpio))
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free_irq(gpio_to_irq(plat->cd_gpio), host);
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out_cd:
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if (gpio_is_valid(plat->cd_gpio)) {
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tegra_gpio_disable(plat->cd_gpio);
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gpio_free(plat->cd_gpio);
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}
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out_power:
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if (gpio_is_valid(plat->power_gpio)) {
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tegra_gpio_disable(plat->power_gpio);
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gpio_free(plat->power_gpio);
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}
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out:
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return rc;
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}
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static void tegra_sdhci_pltfm_exit(struct sdhci_host *host)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
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struct tegra_sdhci_platform_data *plat;
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plat = pdev->dev.platform_data;
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if (gpio_is_valid(plat->wp_gpio)) {
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tegra_gpio_disable(plat->wp_gpio);
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gpio_free(plat->wp_gpio);
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}
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if (gpio_is_valid(plat->cd_gpio)) {
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free_irq(gpio_to_irq(plat->cd_gpio), host);
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tegra_gpio_disable(plat->cd_gpio);
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gpio_free(plat->cd_gpio);
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}
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if (gpio_is_valid(plat->power_gpio)) {
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tegra_gpio_disable(plat->power_gpio);
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gpio_free(plat->power_gpio);
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}
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clk_disable(pltfm_host->clk);
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clk_put(pltfm_host->clk);
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}
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static struct sdhci_ops tegra_sdhci_ops = {
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.get_ro = tegra_sdhci_get_ro,
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.read_l = tegra_sdhci_readl,
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.read_w = tegra_sdhci_readw,
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.write_l = tegra_sdhci_writel,
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.platform_8bit_width = tegra_sdhci_8bit,
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};
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struct sdhci_pltfm_data sdhci_tegra_pdata = {
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.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
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SDHCI_QUIRK_SINGLE_POWER_WRITE |
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SDHCI_QUIRK_NO_HISPD_BIT |
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SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC,
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.ops = &tegra_sdhci_ops,
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.init = tegra_sdhci_pltfm_init,
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.exit = tegra_sdhci_pltfm_exit,
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};
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