forked from luck/tmp_suning_uos_patched
cbaa118ecf
Presently most of the 29-bit physical parts do P1/P2 segmentation with a 1:1 cached/uncached mapping, jumping between the two to control the caching behaviour. This provides the basic infrastructure to maintain this behaviour on 32-bit physical parts that don't map P1/P2 at all, using a shiny new linker section and corresponding fixmap entry. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
12 lines
238 B
C
12 lines
238 B
C
#ifndef __ASM_SH_SECTIONS_H
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#define __ASM_SH_SECTIONS_H
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#include <asm-generic/sections.h>
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extern long __machvec_start, __machvec_end;
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extern char __uncached_start, __uncached_end;
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extern char _ebss[];
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#endif /* __ASM_SH_SECTIONS_H */
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