forked from luck/tmp_suning_uos_patched
48c4ac976a
This reverts commit d532f3d267.
The original commit has several problems:
1) Doesn't work with 64-bit kernels.
2) Calls TLBMISS_HANDLER_SETUP() before the code is generated.
3) Calls TLBMISS_HANDLER_SETUP() twice in per_cpu_trap_init() when
only one call is needed.
[ralf@linux-mips.org: Also revert the bits of the ASID patch which were
hidden in the KVM merge.]
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: "Steven J. Hill" <Steven.Hill@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/5242/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
64 lines
1.4 KiB
C
64 lines
1.4 KiB
C
/*
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* Dump R3000 TLB for debugging purposes.
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*
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* Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
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* Copyright (C) 1999 by Silicon Graphics, Inc.
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* Copyright (C) 1999 by Harald Koerfgen
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*/
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <asm/mipsregs.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/tlbdebug.h>
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extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */
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static void dump_tlb(int first, int last)
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{
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int i;
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unsigned int asid;
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unsigned long entryhi, entrylo0;
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asid = read_c0_entryhi() & 0xfc0;
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for (i = first; i <= last; i++) {
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write_c0_index(i<<8);
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__asm__ __volatile__(
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".set\tnoreorder\n\t"
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"tlbr\n\t"
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"nop\n\t"
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".set\treorder");
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entryhi = read_c0_entryhi();
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entrylo0 = read_c0_entrylo0();
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/* Unused entries have a virtual address of KSEG0. */
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if ((entryhi & 0xffffe000) != 0x80000000
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&& (entryhi & 0xfc0) == asid) {
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/*
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* Only print entries in use
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*/
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printk("Index: %2d ", i);
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printk("va=%08lx asid=%08lx"
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" [pa=%06lx n=%d d=%d v=%d g=%d]",
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(entryhi & 0xffffe000),
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entryhi & 0xfc0,
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entrylo0 & PAGE_MASK,
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(entrylo0 & (1 << 11)) ? 1 : 0,
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(entrylo0 & (1 << 10)) ? 1 : 0,
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(entrylo0 & (1 << 9)) ? 1 : 0,
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(entrylo0 & (1 << 8)) ? 1 : 0);
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}
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}
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printk("\n");
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write_c0_entryhi(asid);
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}
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void dump_tlb_all(void)
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{
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dump_tlb(0, current_cpu_data.tlbsize - 1);
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}
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