forked from luck/tmp_suning_uos_patched
cd916d31cc
Consolidation: remove the pending_irq_cpumask[NR_IRQS] array and move it into the irq_desc[NR_IRQS].pending_mask field. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
63 lines
1.4 KiB
C
63 lines
1.4 KiB
C
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#include <linux/irq.h>
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void set_pending_irq(unsigned int irq, cpumask_t mask)
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{
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struct irq_desc *desc = irq_desc + irq;
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unsigned long flags;
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spin_lock_irqsave(&desc->lock, flags);
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desc->move_irq = 1;
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irq_desc[irq].pending_mask = mask;
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spin_unlock_irqrestore(&desc->lock, flags);
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}
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void move_native_irq(int irq)
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{
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struct irq_desc *desc = irq_desc + irq;
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cpumask_t tmp;
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if (likely(!desc->move_irq))
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return;
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/*
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* Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
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*/
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if (CHECK_IRQ_PER_CPU(desc->status)) {
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WARN_ON(1);
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return;
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}
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desc->move_irq = 0;
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if (unlikely(cpus_empty(irq_desc[irq].pending_mask)))
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return;
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if (!desc->chip->set_affinity)
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return;
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assert_spin_locked(&desc->lock);
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cpus_and(tmp, irq_desc[irq].pending_mask, cpu_online_map);
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/*
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* If there was a valid mask to work with, please
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* do the disable, re-program, enable sequence.
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* This is *not* particularly important for level triggered
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* but in a edge trigger case, we might be setting rte
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* when an active trigger is comming in. This could
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* cause some ioapics to mal-function.
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* Being paranoid i guess!
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*/
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if (likely(!cpus_empty(tmp))) {
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if (likely(!(desc->status & IRQ_DISABLED)))
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desc->chip->disable(irq);
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desc->chip->set_affinity(irq,tmp);
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if (likely(!(desc->status & IRQ_DISABLED)))
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desc->chip->enable(irq);
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}
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cpus_clear(irq_desc[irq].pending_mask);
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}
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