forked from luck/tmp_suning_uos_patched
4ee06b7e67
Remove stale ide.h "configuration options": * INITIAL_MULT_COUNT - always defined to 0 * SUPPORT_SLOW_DATA_PORTS - unused * OK_TO_RESET_CONTROLLER - always defined to 1 * DISABLE_IRQ_NOSYNC - always defined to 0 Leave SUPPORT_VLB_SYNC (defined to 0 for CRIS and FRV, otherwise to 1) for now but disallow overriding it by <asm/ide.h>. There should be no functionality changes caused by this patch. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* linux/include/asm-cris/ide.h
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*
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* Copyright (C) 2000-2004 Axis Communications AB
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*
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* Authors: Bjorn Wesen, Mikael Starvik
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*
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*/
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/*
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* This file contains the ETRAX FS specific IDE code.
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*/
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#ifndef __ASMCRIS_IDE_H
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#define __ASMCRIS_IDE_H
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#ifdef __KERNEL__
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#include <asm/arch/hwregs/intr_vect.h>
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#include <asm/arch/hwregs/ata_defs.h>
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#include <asm/io.h>
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#include <asm-generic/ide_iops.h>
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/* ETRAX FS can support 4 IDE busses on the same pins (serialized) */
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#define MAX_HWIFS 4
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static inline int ide_default_irq(unsigned long base)
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{
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/* all IDE busses share the same IRQ,
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* this has the side-effect that ide-probe.c will cluster our 4 interfaces
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* together in a hwgroup, and will serialize accesses. this is good, because
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* we can't access more than one interface at the same time on ETRAX100.
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*/
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return ATA_INTR_VECT;
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}
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static inline unsigned long ide_default_io_base(int index)
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{
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reg_ata_rw_ctrl2 ctrl2 = {.sel = index};
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/* we have no real I/O base address per interface, since all go through the
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* same register. but in a bitfield in that register, we have the i/f number.
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* so we can use the io_base to remember that bitfield.
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*/
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ctrl2.sel = index;
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return REG_TYPE_CONV(unsigned long, reg_ata_rw_ctrl2, ctrl2);
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}
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#define IDE_ARCH_ACK_INTR
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#define ide_ack_intr(hwif) ((hwif)->ack_intr(hwif))
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#endif /* __KERNEL__ */
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#endif /* __ASMCRIS_IDE_H */
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