kernel_optimize_test/arch/mips/mips-boards/malta
Dmitri Vorobiev 0487de9142 [MIPS] Malta: Fix reading the PCI clock frequency on big-endian
The JMPRS register on Malta boards keeps a 32-bit CPU-endian
value. The readw() function assumes that the value it reads is a
little-endian 16-bit number. Therefore, using readw() to obtain
the value of the JMPRS register is a mistake. This error leads
to incorrect reading of the PCI clock frequency on big-endian
during board start-up.

Change readw() to __raw_readl().

This was tested by injecting a call to printk() and verifying
that the value of the jmpr variable was consistent with current
setting of the JP4 "PCI CLK" jumper.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-22 00:35:23 +00:00
..
Makefile [MIPS] Use -Werror on subdirectories which build cleanly. 2007-07-31 21:35:33 +01:00
malta_int.c [MIPS] checkfiles: Fix "need space after that ','" errors. 2007-10-11 23:46:15 +01:00
malta_mtd.c [MIPS] Malta: Add missing MTD file. 2007-01-08 21:41:04 +00:00
malta_platform.c [MIPS] Put an end to <asm/serial.h>'s long and annyoing existence 2007-07-10 17:33:01 +01:00
malta_setup.c [MIPS] Malta: Fix reading the PCI clock frequency on big-endian 2008-01-22 00:35:23 +00:00
malta_smtc.c [MIPS] IRQ Affinity Support for SMTC on Malta Platform 2007-10-11 23:45:57 +01:00