kernel_optimize_test/include
Shanker Donthineni 6eb486b66a irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling
Booting with GICR_CTLR.EnableLPI=1 is usually a bad idea, and may
result in subtle memory corruption. Detecting this is thus pretty
important.

On detecting that LPIs are still enabled, we taint the kernel (because
we're not sure of anything anymore), and try to disable LPIs. This can
fail, as implementations are allowed to implement GICR_CTLR.EnableLPI
as a one-way enable, meaning the redistributors cannot be reprogrammed
with new tables.

Should this happen, we fail probing the redistributor and warn the user
that things are pretty dire.

Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
[maz: reworded changelog, minor comment and message changes]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-03-23 09:24:25 +00:00
..
acpi
asm-generic
clocksource
crypto
drm
dt-bindings
keys
kvm
linux irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling 2018-03-23 09:24:25 +00:00
math-emu
media
memory
misc
net mlxsw: spectrum: Fix handling of resource_size_param 2018-02-28 12:32:36 -05:00
pcmcia
ras
rdma
scsi SCSI fixes on 20180306 2018-03-07 10:50:15 -08:00
soc ARC fixes for 4.16-rc4 2018-03-01 14:32:23 -08:00
sound
target
trace
uapi powerpc fixes for 4.16 #5 2018-03-09 09:33:48 -08:00
video
xen