forked from luck/tmp_suning_uos_patched
21f47fbc5b
This adds support for the family of Systems-on-Chip produced initially by VIA and now its subsidiary WonderMedia that have recently become widespread in lower-end Chinese ARM-based tablets and netbooks. Support is included for both VT8500 and WM8505, selectable by a configuration switch at kernel build time. Included are basic machine initialization files, register and interrupt definitions, support for the on-chip interrupt controller, high-precision OS timer, GPIO lines, necessary macros for early debug, pulse-width-modulated outputs control, as well as platform device configurations for the specific drivers implemented elsewhere. Signed-off-by: Alexey Charkov <alchark@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
241 lines
6.3 KiB
C
241 lines
6.3 KiB
C
/* linux/arch/arm/mach-vt8500/gpio.c
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*
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* Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include "devices.h"
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#define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip)
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#define ENABLE_REGS 0x0
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#define DIRECTION_REGS 0x20
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#define OUTVALUE_REGS 0x40
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#define INVALUE_REGS 0x60
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#define EXT_REGOFF 0x1c
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static void __iomem *regbase;
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struct vt8500_gpio_chip {
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struct gpio_chip chip;
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unsigned int shift;
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unsigned int regoff;
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};
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static int gpio_to_irq_map[8];
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static int vt8500_muxed_gpio_request(struct gpio_chip *chip,
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unsigned offset)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff);
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val |= (1 << vt8500_chip->shift << offset);
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writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff);
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return 0;
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}
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static void vt8500_muxed_gpio_free(struct gpio_chip *chip,
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unsigned offset)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff);
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val &= ~(1 << vt8500_chip->shift << offset);
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writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff);
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}
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static int vt8500_muxed_gpio_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff);
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val &= ~(1 << vt8500_chip->shift << offset);
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writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff);
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return 0;
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}
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static int vt8500_muxed_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff);
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val |= (1 << vt8500_chip->shift << offset);
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writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff);
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if (value) {
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val = readl(regbase + OUTVALUE_REGS + vt8500_chip->regoff);
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val |= (1 << vt8500_chip->shift << offset);
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writel(val, regbase + OUTVALUE_REGS + vt8500_chip->regoff);
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}
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return 0;
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}
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static int vt8500_muxed_gpio_get_value(struct gpio_chip *chip,
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unsigned offset)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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return (readl(regbase + INVALUE_REGS + vt8500_chip->regoff)
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>> vt8500_chip->shift >> offset) & 1;
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}
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static void vt8500_muxed_gpio_set_value(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
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unsigned val = readl(regbase + INVALUE_REGS + vt8500_chip->regoff);
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if (value)
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val |= (1 << vt8500_chip->shift << offset);
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else
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val &= ~(1 << vt8500_chip->shift << offset);
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writel(val, regbase + INVALUE_REGS + vt8500_chip->regoff);
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}
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#define VT8500_GPIO_BANK(__name, __shift, __off, __base, __num) \
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{ \
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.chip = { \
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.label = __name, \
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.request = vt8500_muxed_gpio_request, \
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.free = vt8500_muxed_gpio_free, \
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.direction_input = vt8500_muxed_gpio_direction_input, \
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.direction_output = vt8500_muxed_gpio_direction_output, \
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.get = vt8500_muxed_gpio_get_value, \
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.set = vt8500_muxed_gpio_set_value, \
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.can_sleep = 0, \
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.base = __base, \
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.ngpio = __num, \
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}, \
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.shift = __shift, \
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.regoff = __off, \
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}
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static struct vt8500_gpio_chip vt8500_muxed_gpios[] = {
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VT8500_GPIO_BANK("uart0", 0, 0x0, 8, 4),
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VT8500_GPIO_BANK("uart1", 4, 0x0, 12, 4),
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VT8500_GPIO_BANK("spi0", 8, 0x0, 16, 4),
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VT8500_GPIO_BANK("spi1", 12, 0x0, 20, 4),
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VT8500_GPIO_BANK("spi2", 16, 0x0, 24, 4),
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VT8500_GPIO_BANK("pwmout", 24, 0x0, 28, 2),
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VT8500_GPIO_BANK("sdmmc", 0, 0x4, 30, 11),
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VT8500_GPIO_BANK("ms", 16, 0x4, 41, 7),
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VT8500_GPIO_BANK("i2c0", 24, 0x4, 48, 2),
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VT8500_GPIO_BANK("i2c1", 26, 0x4, 50, 2),
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VT8500_GPIO_BANK("mii", 0, 0x8, 52, 20),
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VT8500_GPIO_BANK("see", 20, 0x8, 72, 4),
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VT8500_GPIO_BANK("ide", 24, 0x8, 76, 7),
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VT8500_GPIO_BANK("ccir", 0, 0xc, 83, 19),
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VT8500_GPIO_BANK("ts", 8, 0x10, 102, 11),
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VT8500_GPIO_BANK("lcd", 0, 0x14, 113, 23),
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};
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static int vt8500_gpio_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF);
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val &= ~(1 << offset);
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writel(val, regbase + DIRECTION_REGS + EXT_REGOFF);
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return 0;
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}
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static int vt8500_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF);
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val |= (1 << offset);
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writel(val, regbase + DIRECTION_REGS + EXT_REGOFF);
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if (value) {
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val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF);
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val |= (1 << offset);
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writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF);
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}
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return 0;
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}
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static int vt8500_gpio_get_value(struct gpio_chip *chip,
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unsigned offset)
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{
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return (readl(regbase + INVALUE_REGS + EXT_REGOFF) >> offset) & 1;
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}
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static void vt8500_gpio_set_value(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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unsigned val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF);
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if (value)
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val |= (1 << offset);
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else
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val &= ~(1 << offset);
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writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF);
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}
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static int vt8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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if (offset > 7)
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return -EINVAL;
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return gpio_to_irq_map[offset];
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}
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static struct gpio_chip vt8500_external_gpios = {
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.label = "extgpio",
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.direction_input = vt8500_gpio_direction_input,
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.direction_output = vt8500_gpio_direction_output,
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.get = vt8500_gpio_get_value,
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.set = vt8500_gpio_set_value,
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.to_irq = vt8500_gpio_to_irq,
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.can_sleep = 0,
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.base = 0,
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.ngpio = 8,
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};
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void __init vt8500_gpio_init(void)
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{
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int i;
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for (i = 0; i < 8; i++)
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gpio_to_irq_map[i] = wmt_gpio_ext_irq[i];
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regbase = ioremap(wmt_gpio_base, SZ_64K);
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if (!regbase) {
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printk(KERN_ERR "Failed to map MMIO registers for GPIO\n");
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return;
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}
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gpiochip_add(&vt8500_external_gpios);
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for (i = 0; i < ARRAY_SIZE(vt8500_muxed_gpios); i++)
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gpiochip_add(&vt8500_muxed_gpios[i].chip);
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}
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