forked from luck/tmp_suning_uos_patched
e4d9e513de
For HSW/BDW display HD-A controller, hda_set_bclk() is defined to set BCLK by programming the M/N values as per the core display clock (CDCLK) queried from i915 display driver. And the audio driver will also set BCLK in azx_first_init() since the display driver can turn off the shared power in boot phase if only eDP is connected and M/N values will be lost and must be reprogrammed. Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
38 lines
1.2 KiB
C
38 lines
1.2 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __SOUND_HDA_I915_H
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#define __SOUND_HDA_I915_H
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#ifdef CONFIG_SND_HDA_I915
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int hda_display_power(bool enable);
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void haswell_set_bclk(struct azx *chip);
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int hda_i915_init(void);
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int hda_i915_exit(void);
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#else
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static inline int hda_display_power(bool enable) { return 0; }
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static inline void haswell_set_bclk(struct azx *chip) { return; }
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static inline int hda_i915_init(void)
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{
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return -ENODEV;
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}
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static inline int hda_i915_exit(void)
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{
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return 0;
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}
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#endif
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#endif
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