AcoSail/kernel_optimize_test
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da975dd481
kernel_optimize_test/arch/riscv/kernel
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Zong Li da975dd481
RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module 
For CALL_PLT, emit the plt entry only when offset is more than 32-bit.

For PCREL_LO12, it uses the location of corresponding HI20 to
get the address of external symbol. It should check the HI20 type
is the PCREL_HI20 or GOT_HI20, because sometime the location will
have two or more relocation types.
For example:
0:   00000797                auipc   a5,0x0
                     0: R_RISCV_ALIGN        *ABS*
                     0: R_RISCV_GOT_HI20     SYMBOL
4:   0007b783                ld      a5,0(a5) # 0 <SYMBOL>
                     4: R_RISCV_PCREL_LO12_I .L0
                     4: R_RISCV_RELAX        *ABS*

Signed-off-by: Zong Li <zong@andestech.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-04-02 20:00:54 -07:00
..
vdso RISC-V: Make __NR_riscv_flush_icache visible to userspace 2018-01-07 15:14:37 -08:00
.gitignore RISC-V: Build Infrastructure 2017-09-26 15:26:49 -07:00
asm-offsets.c RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
cacheinfo.c
cpu.c
cpufeature.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
entry.S RISC-V: Enable IRQ during exception handling 2018-02-20 10:56:14 -08:00
ftrace.c riscv/ftrace: Add basic support 2018-01-30 19:10:54 -08:00
head.S Rename sbi_save to parse_dtb to improve code readability 2018-02-20 10:56:26 -08:00
irq.c
Makefile RISC-V: Add sections of PLT and GOT for kernel module 2018-04-02 20:00:54 -07:00
mcount.S riscv/ftrace: Add basic support 2018-01-30 19:10:54 -08:00
module-sections.c RISC-V: Add section of GOT.PLT for kernel module 2018-04-02 20:00:54 -07:00
module.c RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module 2018-04-02 20:00:54 -07:00
module.lds RISC-V: Add section of GOT.PLT for kernel module 2018-04-02 20:00:54 -07:00
process.c Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs 2018-01-31 19:18:12 -08:00
ptrace.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
reset.c
riscv_ksyms.c RISC-V: Export some expected symbols for modules 2017-11-30 10:01:10 -08:00
setup.c Rename sbi_save to parse_dtb to improve code readability 2018-02-20 10:56:26 -08:00
signal.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
smp.c RISC-V: Fixes for clean allmodconfig build 2017-12-01 13:31:31 -08:00
smpboot.c
stacktrace.c
sys_riscv.c RISC-V: Logical vs Bitwise typo 2017-12-11 07:51:06 -08:00
syscall_table.c RISC-V: Make __NR_riscv_flush_icache visible to userspace 2018-01-07 15:14:37 -08:00
time.c
traps.c
vdso.c riscv: remove redundant unlikely() 2018-01-30 19:12:06 -08:00
vmlinux.lds.S RISC-V: Build Infrastructure 2017-09-26 15:26:49 -07:00