forked from luck/tmp_suning_uos_patched
18dfc0bf81
The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very similar to what G12A still uses. The (known) differences are: - Meson8 doesn't use any reset lines at all - Meson8b and Meson8m2 use the same reset lines, which are different from what the 64-bit SoCs use - there is no "vapb" clock on the older SoCs - amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but only the power management related registers Add a new compatible string and adjust clock and reset line expectations for each SoC. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200515204709.1505498-2-martin.blumenstingl@googlemail.com
14 lines
361 B
C
14 lines
361 B
C
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
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/*
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* Copyright (c) 2019 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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*/
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#ifndef _DT_BINDINGS_MESON8_POWER_H
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#define _DT_BINDINGS_MESON8_POWER_H
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#define PWRC_MESON8_VPU_ID 0
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#define PWRC_MESON8_ETHERNET_MEM_ID 1
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#define PWRC_MESON8_AUDIO_DSP_MEM_ID 2
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#endif /* _DT_BINDINGS_MESON8_POWER_H */
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