forked from luck/tmp_suning_uos_patched
e02f5c1bb2
The DRM driver stack is designed to work with cache coherent devices only, but permits an optimization to be enabled in some cases, where for some buffers, both the CPU and the GPU use uncached mappings, removing the need for DMA snooping and allocation in the CPU caches. The use of uncached GPU mappings relies on the correct implementation of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU will use cached mappings nonetheless. On x86 platforms, this does not seem to matter, as uncached CPU mappings will snoop the caches in any case. However, on ARM and arm64, enabling this optimization on a platform where NoSnoop is ignored results in loss of coherency, which breaks correct operation of the device. Since we have no way of detecting whether NoSnoop works or not, just disable this optimization entirely for ARM and arm64. Cc: Christian Koenig <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: David Zhou <David1.Zhou@amd.com> Cc: Huang Rui <ray.huang@amd.com> Cc: Junwei Zhang <Jerry.Zhang@amd.com> Cc: Michel Daenzer <michel.daenzer@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Christoph Hellwig <hch@infradead.org> Cc: Robin Murphy <robin.murphy@arm.com> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org> Cc: dri-devel <dri-devel@lists.freedesktop.org> Reported-by: Carsten Haitzler <Carsten.Haitzler@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.kernel.org/patch/10778815/ Signed-off-by: Christian König <christian.koenig@amd.com>
74 lines
2.8 KiB
C
74 lines
2.8 KiB
C
/**************************************************************************
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*
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* Copyright 2009 Red Hat Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*
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**************************************************************************/
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/*
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* Authors:
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* Dave Airlie <airlied@redhat.com>
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*/
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#ifndef _DRM_CACHE_H_
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#define _DRM_CACHE_H_
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#include <linux/scatterlist.h>
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void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
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void drm_clflush_sg(struct sg_table *st);
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void drm_clflush_virt_range(void *addr, unsigned long length);
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u64 drm_get_max_iomem(void);
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static inline bool drm_arch_can_wc_memory(void)
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{
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#if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
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return false;
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#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
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return false;
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#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
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/*
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* The DRM driver stack is designed to work with cache coherent devices
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* only, but permits an optimization to be enabled in some cases, where
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* for some buffers, both the CPU and the GPU use uncached mappings,
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* removing the need for DMA snooping and allocation in the CPU caches.
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*
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* The use of uncached GPU mappings relies on the correct implementation
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* of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
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* will use cached mappings nonetheless. On x86 platforms, this does not
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* seem to matter, as uncached CPU mappings will snoop the caches in any
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* case. However, on ARM and arm64, enabling this optimization on a
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* platform where NoSnoop is ignored results in loss of coherency, which
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* breaks correct operation of the device. Since we have no way of
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* detecting whether NoSnoop works or not, just disable this
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* optimization entirely for ARM and arm64.
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*/
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return false;
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#else
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return true;
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#endif
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}
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#endif
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