forked from luck/tmp_suning_uos_patched
e0cb1b8416
According to the datasheet, SDn clocks are from the SDSRC clock. And
the SDSRC has a 1/2 divider. So, we should have ".sdsrc" as an internal
core clock. Otherwise, since the sdhi driver will calculate clock for
a sd card using the wrong parent clock rate, and then performance will
be not good.
Fixes:
|
||
|---|---|---|
| .. | ||
| at91 | ||
| axis | ||
| axs10x | ||
| bcm | ||
| berlin | ||
| h8300 | ||
| hisilicon | ||
| imx | ||
| ingenic | ||
| keystone | ||
| mediatek | ||
| meson | ||
| microchip | ||
| mmp | ||
| mvebu | ||
| mxs | ||
| nxp | ||
| pistachio | ||
| pxa | ||
| qcom | ||
| renesas | ||
| rockchip | ||
| samsung | ||
| sirf | ||
| socfpga | ||
| spear | ||
| st | ||
| sunxi | ||
| sunxi-ng | ||
| tegra | ||
| ti | ||
| ux500 | ||
| versatile | ||
| x86 | ||
| zte | ||
| zynq | ||
| clk-asm9260.c | ||
| clk-axi-clkgen.c | ||
| clk-axm5516.c | ||
| clk-cdce706.c | ||
| clk-cdce925.c | ||
| clk-clps711x.c | ||
| clk-composite.c | ||
| clk-conf.c | ||
| clk-cs2000-cp.c | ||
| clk-devres.c | ||
| clk-divider.c | ||
| clk-efm32gg.c | ||
| clk-fixed-factor.c | ||
| clk-fixed-rate.c | ||
| clk-fractional-divider.c | ||
| clk-gate.c | ||
| clk-gpio.c | ||
| clk-highbank.c | ||
| clk-ls1x.c | ||
| clk-max-gen.c | ||
| clk-max-gen.h | ||
| clk-max77686.c | ||
| clk-max77802.c | ||
| clk-mb86s7x.c | ||
| clk-moxart.c | ||
| clk-multiplier.c | ||
| clk-mux.c | ||
| clk-nomadik.c | ||
| clk-nspire.c | ||
| clk-oxnas.c | ||
| clk-palmas.c | ||
| clk-pwm.c | ||
| clk-qoriq.c | ||
| clk-rk808.c | ||
| clk-s2mps11.c | ||
| clk-scpi.c | ||
| clk-si514.c | ||
| clk-si570.c | ||
| clk-si5351.c | ||
| clk-si5351.h | ||
| clk-stm32f4.c | ||
| clk-tango4.c | ||
| clk-twl6040.c | ||
| clk-u300.c | ||
| clk-vt8500.c | ||
| clk-wm831x.c | ||
| clk-xgene.c | ||
| clk.c | ||
| clk.h | ||
| clkdev.c | ||
| Kconfig | ||
| Makefile | ||