kernel_optimize_test/mips-gic.h at e0de91a977bfe4c199138fa256a211a648ef6999 - kernel_optimize_test - AcoSail's gitea

AcoSail/kernel_optimize_test

forked from luck/tmp_suning_uos_patched

Andrew Bresticker 2ff404005e of: Add binding document for MIPS GIC

The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors.  It also supports a timer and software-generated
interrupts.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8420/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2014-11-24 07:45:30 +01:00

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 #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
 #define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H
 #include <dt-bindings/interrupt-controller/irq.h>
 #define GIC_SHARED 0
 #define GIC_LOCAL 1
 #endif