forked from luck/tmp_suning_uos_patched
976897dd96
Add AC timings information needed to support LPDDR3 and memory controllers along with helpers to obtain it. These will be necessary for upcoming Exynos5422 Dynamic Memory Controller driver. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
301 lines
9.7 KiB
C
301 lines
9.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* OpenFirmware helpers for memory drivers
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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* Copyright (C) 2019 Samsung Electronics Co., Ltd.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/list.h>
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#include <linux/of.h>
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#include <linux/gfp.h>
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#include <linux/export.h>
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#include "jedec_ddr.h"
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#include "of_memory.h"
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/**
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* of_get_min_tck() - extract min timing values for ddr
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* @np: pointer to ddr device tree node
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* @device: device requesting for min timing values
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*
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* Populates the lpddr2_min_tck structure by extracting data
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* from device tree node. Returns a pointer to the populated
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* structure. If any error in populating the structure, returns
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* default min timings provided by JEDEC.
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*/
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const struct lpddr2_min_tck *of_get_min_tck(struct device_node *np,
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struct device *dev)
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{
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int ret = 0;
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struct lpddr2_min_tck *min;
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min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
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if (!min)
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goto default_min_tck;
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ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
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ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
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ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
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ret |= of_property_read_u32(np, "tRASmin-min-tck", &min->tRASmin);
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ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
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ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
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ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
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ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
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ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
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ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
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ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
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if (ret) {
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devm_kfree(dev, min);
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goto default_min_tck;
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}
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return min;
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default_min_tck:
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dev_warn(dev, "%s: using default min-tck values\n", __func__);
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return &lpddr2_jedec_min_tck;
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}
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EXPORT_SYMBOL(of_get_min_tck);
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static int of_do_get_timings(struct device_node *np,
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struct lpddr2_timings *tim)
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{
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int ret;
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ret = of_property_read_u32(np, "max-freq", &tim->max_freq);
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ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
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ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
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ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
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ret |= of_property_read_u32(np, "tWR", &tim->tWR);
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ret |= of_property_read_u32(np, "tRAS-min", &tim->tRAS_min);
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ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
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ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
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ret |= of_property_read_u32(np, "tXP", &tim->tXP);
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ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
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ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
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ret |= of_property_read_u32(np, "tDQSCK-max", &tim->tDQSCK_max);
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ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
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ret |= of_property_read_u32(np, "tZQCS", &tim->tZQCS);
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ret |= of_property_read_u32(np, "tZQCL", &tim->tZQCL);
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ret |= of_property_read_u32(np, "tZQinit", &tim->tZQinit);
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ret |= of_property_read_u32(np, "tRAS-max-ns", &tim->tRAS_max_ns);
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ret |= of_property_read_u32(np, "tDQSCK-max-derated",
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&tim->tDQSCK_max_derated);
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return ret;
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}
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/**
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* of_get_ddr_timings() - extracts the ddr timings and updates no of
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* frequencies available.
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* @np_ddr: Pointer to ddr device tree node
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* @dev: Device requesting for ddr timings
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* @device_type: Type of ddr(LPDDR2 S2/S4)
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* @nr_frequencies: No of frequencies available for ddr
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* (updated by this function)
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*
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* Populates lpddr2_timings structure by extracting data from device
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* tree node. Returns pointer to populated structure. If any error
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* while populating, returns default timings provided by JEDEC.
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*/
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const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr,
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struct device *dev, u32 device_type, u32 *nr_frequencies)
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{
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struct lpddr2_timings *timings = NULL;
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u32 arr_sz = 0, i = 0;
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struct device_node *np_tim;
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char *tim_compat = NULL;
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switch (device_type) {
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case DDR_TYPE_LPDDR2_S2:
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case DDR_TYPE_LPDDR2_S4:
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tim_compat = "jedec,lpddr2-timings";
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break;
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default:
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dev_warn(dev, "%s: un-supported memory type\n", __func__);
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}
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for_each_child_of_node(np_ddr, np_tim)
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if (of_device_is_compatible(np_tim, tim_compat))
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arr_sz++;
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if (arr_sz)
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timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
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GFP_KERNEL);
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if (!timings)
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goto default_timings;
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for_each_child_of_node(np_ddr, np_tim) {
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if (of_device_is_compatible(np_tim, tim_compat)) {
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if (of_do_get_timings(np_tim, &timings[i])) {
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devm_kfree(dev, timings);
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goto default_timings;
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}
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i++;
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}
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}
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*nr_frequencies = arr_sz;
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return timings;
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default_timings:
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dev_warn(dev, "%s: using default timings\n", __func__);
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*nr_frequencies = ARRAY_SIZE(lpddr2_jedec_timings);
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return lpddr2_jedec_timings;
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}
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EXPORT_SYMBOL(of_get_ddr_timings);
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/**
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* of_lpddr3_get_min_tck() - extract min timing values for lpddr3
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* @np: pointer to ddr device tree node
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* @device: device requesting for min timing values
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*
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* Populates the lpddr3_min_tck structure by extracting data
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* from device tree node. Returns a pointer to the populated
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* structure. If any error in populating the structure, returns NULL.
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*/
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const struct lpddr3_min_tck *of_lpddr3_get_min_tck(struct device_node *np,
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struct device *dev)
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{
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int ret = 0;
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struct lpddr3_min_tck *min;
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min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL);
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if (!min)
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goto default_min_tck;
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ret |= of_property_read_u32(np, "tRFC-min-tck", &min->tRFC);
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ret |= of_property_read_u32(np, "tRRD-min-tck", &min->tRRD);
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ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab);
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ret |= of_property_read_u32(np, "tRPpb-min-tck", &min->tRPpb);
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ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD);
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ret |= of_property_read_u32(np, "tRC-min-tck", &min->tRC);
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ret |= of_property_read_u32(np, "tRAS-min-tck", &min->tRAS);
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ret |= of_property_read_u32(np, "tWTR-min-tck", &min->tWTR);
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ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR);
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ret |= of_property_read_u32(np, "tRTP-min-tck", &min->tRTP);
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ret |= of_property_read_u32(np, "tW2W-C2C-min-tck", &min->tW2W_C2C);
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ret |= of_property_read_u32(np, "tR2R-C2C-min-tck", &min->tR2R_C2C);
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ret |= of_property_read_u32(np, "tWL-min-tck", &min->tWL);
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ret |= of_property_read_u32(np, "tDQSCK-min-tck", &min->tDQSCK);
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ret |= of_property_read_u32(np, "tRL-min-tck", &min->tRL);
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ret |= of_property_read_u32(np, "tFAW-min-tck", &min->tFAW);
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ret |= of_property_read_u32(np, "tXSR-min-tck", &min->tXSR);
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ret |= of_property_read_u32(np, "tXP-min-tck", &min->tXP);
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ret |= of_property_read_u32(np, "tCKE-min-tck", &min->tCKE);
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ret |= of_property_read_u32(np, "tCKESR-min-tck", &min->tCKESR);
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ret |= of_property_read_u32(np, "tMRD-min-tck", &min->tMRD);
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if (ret) {
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dev_warn(dev, "%s: errors while parsing min-tck values\n",
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__func__);
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devm_kfree(dev, min);
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goto default_min_tck;
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}
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return min;
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default_min_tck:
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dev_warn(dev, "%s: using default min-tck values\n", __func__);
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return NULL;
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}
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EXPORT_SYMBOL(of_lpddr3_get_min_tck);
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static int of_lpddr3_do_get_timings(struct device_node *np,
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struct lpddr3_timings *tim)
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{
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int ret;
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/* The 'reg' param required since DT has changed, used as 'max-freq' */
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ret = of_property_read_u32(np, "reg", &tim->max_freq);
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ret |= of_property_read_u32(np, "min-freq", &tim->min_freq);
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ret |= of_property_read_u32(np, "tRFC", &tim->tRFC);
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ret |= of_property_read_u32(np, "tRRD", &tim->tRRD);
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ret |= of_property_read_u32(np, "tRPab", &tim->tRPab);
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ret |= of_property_read_u32(np, "tRPpb", &tim->tRPpb);
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ret |= of_property_read_u32(np, "tRCD", &tim->tRCD);
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ret |= of_property_read_u32(np, "tRC", &tim->tRC);
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ret |= of_property_read_u32(np, "tRAS", &tim->tRAS);
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ret |= of_property_read_u32(np, "tWTR", &tim->tWTR);
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ret |= of_property_read_u32(np, "tWR", &tim->tWR);
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ret |= of_property_read_u32(np, "tRTP", &tim->tRTP);
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ret |= of_property_read_u32(np, "tW2W-C2C", &tim->tW2W_C2C);
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ret |= of_property_read_u32(np, "tR2R-C2C", &tim->tR2R_C2C);
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ret |= of_property_read_u32(np, "tFAW", &tim->tFAW);
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ret |= of_property_read_u32(np, "tXSR", &tim->tXSR);
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ret |= of_property_read_u32(np, "tXP", &tim->tXP);
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ret |= of_property_read_u32(np, "tCKE", &tim->tCKE);
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ret |= of_property_read_u32(np, "tCKESR", &tim->tCKESR);
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ret |= of_property_read_u32(np, "tMRD", &tim->tMRD);
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return ret;
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}
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/**
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* of_lpddr3_get_ddr_timings() - extracts the lpddr3 timings and updates no of
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* frequencies available.
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* @np_ddr: Pointer to ddr device tree node
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* @dev: Device requesting for ddr timings
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* @device_type: Type of ddr
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* @nr_frequencies: No of frequencies available for ddr
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* (updated by this function)
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*
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* Populates lpddr3_timings structure by extracting data from device
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* tree node. Returns pointer to populated structure. If any error
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* while populating, returns NULL.
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*/
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const struct lpddr3_timings
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*of_lpddr3_get_ddr_timings(struct device_node *np_ddr, struct device *dev,
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u32 device_type, u32 *nr_frequencies)
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{
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struct lpddr3_timings *timings = NULL;
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u32 arr_sz = 0, i = 0;
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struct device_node *np_tim;
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char *tim_compat = NULL;
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switch (device_type) {
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case DDR_TYPE_LPDDR3:
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tim_compat = "jedec,lpddr3-timings";
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break;
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default:
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dev_warn(dev, "%s: un-supported memory type\n", __func__);
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}
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for_each_child_of_node(np_ddr, np_tim)
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if (of_device_is_compatible(np_tim, tim_compat))
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arr_sz++;
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if (arr_sz)
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timings = devm_kcalloc(dev, arr_sz, sizeof(*timings),
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GFP_KERNEL);
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if (!timings)
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goto default_timings;
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for_each_child_of_node(np_ddr, np_tim) {
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if (of_device_is_compatible(np_tim, tim_compat)) {
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if (of_lpddr3_do_get_timings(np_tim, &timings[i])) {
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devm_kfree(dev, timings);
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goto default_timings;
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}
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i++;
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}
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}
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*nr_frequencies = arr_sz;
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return timings;
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default_timings:
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dev_warn(dev, "%s: failed to get timings\n", __func__);
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*nr_frequencies = 0;
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return NULL;
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}
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EXPORT_SYMBOL(of_lpddr3_get_ddr_timings);
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