kernel_optimize_test/drivers/clk/imx
Stephen Boyd 74ca928886 Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next
* clk-hisi:
  clk: hi6220: use CLK_OF_DECLARE_DRIVER

* clk-amlogic:
  clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code
  clk: meson: axg_audio: add sm1 support
  clk: meson: axg-audio: provide clk top signal name
  clk: meson: axg-audio: prepare sm1 addition
  clk: meson: axg-audio: fix regmap last register
  clk: meson: axg-audio: remove useless defines
  dt-bindings: clock: meson: add sm1 resets to the axg-audio controller
  dt-bindings: clk: axg-audio: add sm1 bindings
  clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes
  clk: meson: g12a: fix cpu clock rate setting
  clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate

* clk-samsung:
  clk: samsung: exynos5420: Add SET_RATE_PARENT flag to clocks on G3D path
  clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume
  clk: samsung: exynos5420: Add VPLL rate table
  clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume
  clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMU
  clk: samsung: exynos5433: Fix error paths

* clk-renesas: (23 commits)
  clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
  clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960
  dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support
  clk: renesas: r8a77965: Remove superfluous semicolon
  dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example
  dt-bindings: clock: renesas: Remove R-Car Gen2 legacy DT bindings
  dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
  dt-bindings: power: Add r8a77961 SYSC power domain definitions
  clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate()
  clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate()
  clk: renesas: rcar-gen2: Switch Z clock to .determine_rate()
  clk: renesas: r8a774b1: Add TMU clock
  clk: renesas: cpg-mssr: Add r8a774b1 support
  dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding
  clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate()
  clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div()
  clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate()
  clk: renesas: rcar-gen3: Improve arithmetic divisions
  clk: renesas: rcar-gen2: Improve arithmetic divisions
  clk: renesas: Remove R-Car Gen2 legacy DT clock support
  ...

* clk-imx:
  clk: imx: imx8mq: fix sys3_pll_out_sels
  clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock
  clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code
  clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code
  clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code
  clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code
  clk: imx7ulp: Correct DDR clock mux options
  clk: imx7ulp: Correct system clock source option #7
  clk: imx: imx8mq: mark sys1/2_pll as fixed clock
  clk: imx: imx8mn: mark sys_pll1/2 as fixed clock
  clk: imx: imx8mm: mark sys_pll1/2 as fixed clock
  clk: imx8mn: Define gates for pll1/2 fixed dividers
  clk: imx8mm: Define gates for pll1/2 fixed dividers
  clk: imx8mq: Define gates for pll1/2 fixed dividers
  clk: imx: clk-pll14xx: Make two variables static
  clk: imx8mq: Add VIDEO2_PLL clock
  clk: imx8mn: Use common 1443X/1416X PLL clock structure
  clk: imx8mm: Move 1443X/1416X PLL clock structure to common place
  clk: imx: pll14xx: Fix quick switch of S/K parameter
2019-11-27 08:14:17 -08:00
..
clk-busy.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-composite-7ulp.c
clk-composite-8m.c
clk-cpu.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-divider-gate.c
clk-fixup-div.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-fixup-mux.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-frac-pll.c
clk-gate-exclusive.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-gate2.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-imx1.c
clk-imx5.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-imx6q.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-imx6sl.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-imx6sll.c clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code 2019-10-28 16:46:45 +08:00
clk-imx6sx.c clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code 2019-10-28 16:46:50 +08:00
clk-imx6ul.c clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code 2019-10-28 16:46:54 +08:00
clk-imx7d.c clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code 2019-10-28 16:45:09 +08:00
clk-imx7ulp.c clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock 2019-10-28 19:32:37 +08:00
clk-imx8mm.c clk: imx: imx8mm: mark sys_pll1/2 as fixed clock 2019-10-25 17:06:47 +08:00
clk-imx8mn.c Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next 2019-11-27 08:14:17 -08:00
clk-imx8mq.c clk: imx: imx8mq: fix sys3_pll_out_sels 2019-11-04 09:10:49 +08:00
clk-imx8qxp-lpcg.c clk: imx8: Add DSP related clocks 2019-08-03 09:16:02 +02:00
clk-imx8qxp-lpcg.h
clk-imx8qxp.c
clk-imx21.c
clk-imx25.c
clk-imx27.c
clk-imx31.c
clk-imx35.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-lpcg-scu.c
clk-pfd.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-pfdv2.c
clk-pll14xx.c clk: imx: clk-pll14xx: Make two variables static 2019-10-14 21:22:20 +08:00
clk-pllv1.c
clk-pllv2.c
clk-pllv3.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-pllv4.c
clk-sccg-pll.c
clk-scu.c
clk-scu.h
clk-vf610.c
clk.c clk: imx: Add API for clk unregister when driver probe fail 2019-08-03 09:16:01 +02:00
clk.h clk: imx8mm: Move 1443X/1416X PLL clock structure to common place 2019-10-06 10:13:01 +08:00
Kconfig clk: imx: Add support for i.MX8MN clock driver 2019-08-03 09:16:02 +02:00
Makefile clk: imx: Add support for i.MX8MN clock driver 2019-08-03 09:16:02 +02:00