forked from luck/tmp_suning_uos_patched
8f1ae77f46
The Allwinner A31 and most of the other Allwinner SoCs have an IP maintaining a few other IPs in the SoC in reset by default. Among these IPs are the A31's High Speed Timers, hence why we can't use the regular driver construct in every cases, and need to call the registering function directly during machine initialisation. Apart from this, the implementation is fairly straightforward, and could easily be moved to a generic MMIO-based reset controller driver if the need ever arise. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
3 lines
83 B
Makefile
3 lines
83 B
Makefile
obj-$(CONFIG_RESET_CONTROLLER) += core.o
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obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
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