forked from luck/tmp_suning_uos_patched
e425382ed9
Update the clock settings on resume for suspend/resume support so that if the boot loader changes anything or the system's PLL is reset then we return with the correct settings. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
142 lines
3.2 KiB
C
142 lines
3.2 KiB
C
/* linux/arch/arm/mach-s3c2410/s3c2410.c
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*
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* Copyright (c) 2003-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* http://www.simtec.co.uk/products/EB2410ITX/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <plat/cpu-freq.h>
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#include <mach/regs-clock.h>
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#include <plat/regs-serial.h>
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#include <plat/s3c2410.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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#include <plat/pll.h>
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/* Initial IO mappings */
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static struct map_desc s3c2410_iodesc[] __initdata = {
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IODESC_ENT(CLKPWR),
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IODESC_ENT(TIMER),
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IODESC_ENT(WATCHDOG),
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};
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/* our uart devices */
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/* uart registration process */
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void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
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}
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/* s3c2410_map_io
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*
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* register the standard cpu IO areas, and any passed in from the
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* machine specific initialisation.
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*/
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void __init s3c2410_map_io(void)
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{
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iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
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}
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void __init_or_cpufreq s3c2410_setup_clocks(void)
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{
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struct clk *xtal_clk;
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unsigned long tmp;
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unsigned long xtal;
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unsigned long fclk;
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unsigned long hclk;
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unsigned long pclk;
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xtal_clk = clk_get(NULL, "xtal");
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xtal = clk_get_rate(xtal_clk);
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clk_put(xtal_clk);
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/* now we've got our machine bits initialised, work out what
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* clocks we've got */
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fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
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tmp = __raw_readl(S3C2410_CLKDIVN);
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/* work out clock scalings */
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hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
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pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
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/* print brieft summary of clocks, etc */
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printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
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print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
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/* initialise the clocks here, to allow other things like the
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* console to use them
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*/
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s3c24xx_setup_clocks(fclk, hclk, pclk);
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}
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void __init s3c2410_init_clocks(int xtal)
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{
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s3c24xx_register_baseclocks(xtal);
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s3c2410_setup_clocks();
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s3c2410_baseclk_add();
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}
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struct sysdev_class s3c2410_sysclass = {
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.name = "s3c2410-core",
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};
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static struct sys_device s3c2410_sysdev = {
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.cls = &s3c2410_sysclass,
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};
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/* need to register class before we actually register the device, and
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* we also need to ensure that it has been initialised before any of the
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* drivers even try to use it (even if not on an s3c2410 based system)
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* as a driver which may support both 2410 and 2440 may try and use it.
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*/
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static int __init s3c2410_core_init(void)
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{
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return sysdev_class_register(&s3c2410_sysclass);
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}
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core_initcall(s3c2410_core_init);
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int __init s3c2410_init(void)
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{
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printk("S3C2410: Initialising architecture\n");
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return sysdev_register(&s3c2410_sysdev);
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}
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