forked from luck/tmp_suning_uos_patched
c2ff081093
Add power domain indices for R-Car V3U (r8a779a0). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1599470390-29719-5-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
60 lines
1.7 KiB
C
60 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A779A0_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A779A0_SYSC_H__
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/*
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* These power domain indices match the Power Domain Register Numbers (PDR)
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*/
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#define R8A779A0_PD_A1E0D0C0 0
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#define R8A779A0_PD_A1E0D0C1 1
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#define R8A779A0_PD_A1E0D1C0 2
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#define R8A779A0_PD_A1E0D1C1 3
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#define R8A779A0_PD_A1E1D0C0 4
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#define R8A779A0_PD_A1E1D0C1 5
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#define R8A779A0_PD_A1E1D1C0 6
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#define R8A779A0_PD_A1E1D1C1 7
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#define R8A779A0_PD_A2E0D0 16
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#define R8A779A0_PD_A2E0D1 17
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#define R8A779A0_PD_A2E1D0 18
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#define R8A779A0_PD_A2E1D1 19
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#define R8A779A0_PD_A3E0 20
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#define R8A779A0_PD_A3E1 21
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#define R8A779A0_PD_3DG_A 24
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#define R8A779A0_PD_3DG_B 25
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#define R8A779A0_PD_A1CNN2 32
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#define R8A779A0_PD_A1DSP0 33
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#define R8A779A0_PD_A2IMP01 34
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#define R8A779A0_PD_A2DP0 35
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#define R8A779A0_PD_A2CV0 36
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#define R8A779A0_PD_A2CV1 37
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#define R8A779A0_PD_A2CV4 38
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#define R8A779A0_PD_A2CV6 39
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#define R8A779A0_PD_A2CN2 40
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#define R8A779A0_PD_A1CNN0 41
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#define R8A779A0_PD_A2CN0 42
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#define R8A779A0_PD_A3IR 43
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#define R8A779A0_PD_A1CNN1 44
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#define R8A779A0_PD_A1DSP1 45
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#define R8A779A0_PD_A2IMP23 46
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#define R8A779A0_PD_A2DP1 47
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#define R8A779A0_PD_A2CV2 48
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#define R8A779A0_PD_A2CV3 49
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#define R8A779A0_PD_A2CV5 50
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#define R8A779A0_PD_A2CV7 51
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#define R8A779A0_PD_A2CN1 52
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#define R8A779A0_PD_A3VIP0 56
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#define R8A779A0_PD_A3VIP1 57
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#define R8A779A0_PD_A3VIP2 58
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#define R8A779A0_PD_A3VIP3 59
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#define R8A779A0_PD_A3ISP01 60
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#define R8A779A0_PD_A3ISP23 61
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/* Always-on power area */
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#define R8A779A0_PD_ALWAYS_ON 64
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#endif /* __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ */
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