forked from luck/tmp_suning_uos_patched
0376027051
xtensa assembler is capable of representing register loads with either movi + addmi, l32r or const16, depending on the core configuration. Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let the assembler relax them. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> |
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| .. | ||
| .gitignore | ||
| boot.lds.S | ||
| bootstrap.S | ||
| Makefile | ||