forked from luck/tmp_suning_uos_patched
77eb65cbc1
die() doesn't return, therefore print registers and then panic instead. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
742 lines
22 KiB
C
742 lines
22 KiB
C
/*
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* arch/s390/kernel/traps.c
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*
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* S390 version
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* Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
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* Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
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*
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* Derived from "arch/i386/kernel/traps.c"
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* Copyright (C) 1991, 1992 Linus Torvalds
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*/
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/*
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* 'Traps.c' handles hardware traps and faults after we have saved some
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* state in 'asm.s'.
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*/
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#include <linux/config.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/kallsyms.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/atomic.h>
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#include <asm/mathemu.h>
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#include <asm/cpcmd.h>
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#include <asm/s390_ext.h>
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#include <asm/lowcore.h>
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#include <asm/debug.h>
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/* Called from entry.S only */
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extern void handle_per_exception(struct pt_regs *regs);
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typedef void pgm_check_handler_t(struct pt_regs *, long);
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pgm_check_handler_t *pgm_check_table[128];
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#ifdef CONFIG_SYSCTL
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#ifdef CONFIG_PROCESS_DEBUG
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int sysctl_userprocess_debug = 1;
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#else
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int sysctl_userprocess_debug = 0;
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#endif
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#endif
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extern pgm_check_handler_t do_protection_exception;
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extern pgm_check_handler_t do_dat_exception;
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extern pgm_check_handler_t do_pseudo_page_fault;
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#ifdef CONFIG_PFAULT
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extern int pfault_init(void);
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extern void pfault_fini(void);
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extern void pfault_interrupt(struct pt_regs *regs, __u16 error_code);
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static ext_int_info_t ext_int_pfault;
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#endif
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extern pgm_check_handler_t do_monitor_call;
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#define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
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#ifndef CONFIG_ARCH_S390X
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#define FOURLONG "%08lx %08lx %08lx %08lx\n"
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static int kstack_depth_to_print = 12;
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#else /* CONFIG_ARCH_S390X */
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#define FOURLONG "%016lx %016lx %016lx %016lx\n"
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static int kstack_depth_to_print = 20;
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#endif /* CONFIG_ARCH_S390X */
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/*
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* For show_trace we have tree different stack to consider:
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* - the panic stack which is used if the kernel stack has overflown
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* - the asynchronous interrupt stack (cpu related)
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* - the synchronous kernel stack (process related)
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* The stack trace can start at any of the three stack and can potentially
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* touch all of them. The order is: panic stack, async stack, sync stack.
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*/
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static unsigned long
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__show_trace(unsigned long sp, unsigned long low, unsigned long high)
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{
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struct stack_frame *sf;
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struct pt_regs *regs;
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while (1) {
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sp = sp & PSW_ADDR_INSN;
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if (sp < low || sp > high - sizeof(*sf))
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return sp;
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sf = (struct stack_frame *) sp;
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printk("([<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
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print_symbol("%s)\n", sf->gprs[8] & PSW_ADDR_INSN);
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/* Follow the backchain. */
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while (1) {
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low = sp;
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sp = sf->back_chain & PSW_ADDR_INSN;
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if (!sp)
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break;
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if (sp <= low || sp > high - sizeof(*sf))
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return sp;
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sf = (struct stack_frame *) sp;
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printk(" [<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
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print_symbol("%s\n", sf->gprs[8] & PSW_ADDR_INSN);
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}
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/* Zero backchain detected, check for interrupt frame. */
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sp = (unsigned long) (sf + 1);
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if (sp <= low || sp > high - sizeof(*regs))
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return sp;
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regs = (struct pt_regs *) sp;
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printk(" [<%016lx>] ", regs->psw.addr & PSW_ADDR_INSN);
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print_symbol("%s\n", regs->psw.addr & PSW_ADDR_INSN);
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low = sp;
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sp = regs->gprs[15];
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}
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}
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void show_trace(struct task_struct *task, unsigned long * stack)
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{
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register unsigned long __r15 asm ("15");
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unsigned long sp;
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sp = (unsigned long) stack;
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if (!sp)
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sp = task ? task->thread.ksp : __r15;
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printk("Call Trace:\n");
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#ifdef CONFIG_CHECK_STACK
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sp = __show_trace(sp, S390_lowcore.panic_stack - 4096,
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S390_lowcore.panic_stack);
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#endif
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sp = __show_trace(sp, S390_lowcore.async_stack - ASYNC_SIZE,
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S390_lowcore.async_stack);
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if (task)
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__show_trace(sp, (unsigned long) task->thread_info,
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(unsigned long) task->thread_info + THREAD_SIZE);
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else
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__show_trace(sp, S390_lowcore.thread_info,
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S390_lowcore.thread_info + THREAD_SIZE);
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printk("\n");
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}
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void show_stack(struct task_struct *task, unsigned long *sp)
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{
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register unsigned long * __r15 asm ("15");
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unsigned long *stack;
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int i;
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// debugging aid: "show_stack(NULL);" prints the
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// back trace for this cpu.
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if (!sp)
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sp = task ? (unsigned long *) task->thread.ksp : __r15;
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stack = sp;
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for (i = 0; i < kstack_depth_to_print; i++) {
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if (((addr_t) stack & (THREAD_SIZE-1)) == 0)
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break;
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if (i && ((i * sizeof (long) % 32) == 0))
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printk("\n ");
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printk("%p ", (void *)*stack++);
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}
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printk("\n");
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show_trace(task, sp);
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}
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/*
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* The architecture-independent dump_stack generator
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*/
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void dump_stack(void)
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{
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show_stack(0, 0);
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}
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EXPORT_SYMBOL(dump_stack);
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void show_registers(struct pt_regs *regs)
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{
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mm_segment_t old_fs;
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char *mode;
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int i;
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mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
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printk("%s PSW : %p %p",
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mode, (void *) regs->psw.mask,
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(void *) regs->psw.addr);
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print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
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printk("%s GPRS: " FOURLONG, mode,
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regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
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printk(" " FOURLONG,
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regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
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printk(" " FOURLONG,
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regs->gprs[8], regs->gprs[9], regs->gprs[10], regs->gprs[11]);
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printk(" " FOURLONG,
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regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
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#if 0
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/* FIXME: this isn't needed any more but it changes the ksymoops
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* input. To remove or not to remove ... */
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save_access_regs(regs->acrs);
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printk("%s ACRS: %08x %08x %08x %08x\n", mode,
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regs->acrs[0], regs->acrs[1], regs->acrs[2], regs->acrs[3]);
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printk(" %08x %08x %08x %08x\n",
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regs->acrs[4], regs->acrs[5], regs->acrs[6], regs->acrs[7]);
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printk(" %08x %08x %08x %08x\n",
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regs->acrs[8], regs->acrs[9], regs->acrs[10], regs->acrs[11]);
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printk(" %08x %08x %08x %08x\n",
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regs->acrs[12], regs->acrs[13], regs->acrs[14], regs->acrs[15]);
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#endif
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/*
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* Print the first 20 byte of the instruction stream at the
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* time of the fault.
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*/
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old_fs = get_fs();
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if (regs->psw.mask & PSW_MASK_PSTATE)
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set_fs(USER_DS);
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else
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set_fs(KERNEL_DS);
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printk("%s Code: ", mode);
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for (i = 0; i < 20; i++) {
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unsigned char c;
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if (__get_user(c, (char __user *)(regs->psw.addr + i))) {
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printk(" Bad PSW.");
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break;
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}
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printk("%02x ", c);
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}
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set_fs(old_fs);
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printk("\n");
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}
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/* This is called from fs/proc/array.c */
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char *task_show_regs(struct task_struct *task, char *buffer)
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{
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struct pt_regs *regs;
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regs = __KSTK_PTREGS(task);
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buffer += sprintf(buffer, "task: %p, ksp: %p\n",
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task, (void *)task->thread.ksp);
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buffer += sprintf(buffer, "User PSW : %p %p\n",
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(void *) regs->psw.mask, (void *)regs->psw.addr);
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buffer += sprintf(buffer, "User GPRS: " FOURLONG,
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regs->gprs[0], regs->gprs[1],
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regs->gprs[2], regs->gprs[3]);
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buffer += sprintf(buffer, " " FOURLONG,
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regs->gprs[4], regs->gprs[5],
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regs->gprs[6], regs->gprs[7]);
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buffer += sprintf(buffer, " " FOURLONG,
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regs->gprs[8], regs->gprs[9],
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regs->gprs[10], regs->gprs[11]);
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buffer += sprintf(buffer, " " FOURLONG,
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regs->gprs[12], regs->gprs[13],
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regs->gprs[14], regs->gprs[15]);
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buffer += sprintf(buffer, "User ACRS: %08x %08x %08x %08x\n",
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task->thread.acrs[0], task->thread.acrs[1],
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task->thread.acrs[2], task->thread.acrs[3]);
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buffer += sprintf(buffer, " %08x %08x %08x %08x\n",
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task->thread.acrs[4], task->thread.acrs[5],
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task->thread.acrs[6], task->thread.acrs[7]);
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buffer += sprintf(buffer, " %08x %08x %08x %08x\n",
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task->thread.acrs[8], task->thread.acrs[9],
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task->thread.acrs[10], task->thread.acrs[11]);
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buffer += sprintf(buffer, " %08x %08x %08x %08x\n",
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task->thread.acrs[12], task->thread.acrs[13],
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task->thread.acrs[14], task->thread.acrs[15]);
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return buffer;
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}
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DEFINE_SPINLOCK(die_lock);
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void die(const char * str, struct pt_regs * regs, long err)
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{
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static int die_counter;
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debug_stop_all();
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console_verbose();
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spin_lock_irq(&die_lock);
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bust_spinlocks(1);
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printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
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show_regs(regs);
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bust_spinlocks(0);
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spin_unlock_irq(&die_lock);
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception: panic_on_oops");
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do_exit(SIGSEGV);
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}
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static void inline
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report_user_fault(long interruption_code, struct pt_regs *regs)
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{
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#if defined(CONFIG_SYSCTL)
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if (!sysctl_userprocess_debug)
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return;
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#endif
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#if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG)
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printk("User process fault: interruption code 0x%lX\n",
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interruption_code);
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show_regs(regs);
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#endif
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}
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static void inline do_trap(long interruption_code, int signr, char *str,
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struct pt_regs *regs, siginfo_t *info)
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{
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/*
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* We got all needed information from the lowcore and can
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* now safely switch on interrupts.
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*/
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if (regs->psw.mask & PSW_MASK_PSTATE)
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local_irq_enable();
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if (regs->psw.mask & PSW_MASK_PSTATE) {
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struct task_struct *tsk = current;
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tsk->thread.trap_no = interruption_code & 0xffff;
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force_sig_info(signr, info, tsk);
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report_user_fault(interruption_code, regs);
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} else {
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const struct exception_table_entry *fixup;
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fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
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if (fixup)
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regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
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else
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die(str, regs, interruption_code);
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}
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}
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static inline void *get_check_address(struct pt_regs *regs)
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{
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return (void *)((regs->psw.addr-S390_lowcore.pgm_ilc) & PSW_ADDR_INSN);
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}
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void do_single_step(struct pt_regs *regs)
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{
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if ((current->ptrace & PT_PTRACED) != 0)
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force_sig(SIGTRAP, current);
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}
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asmlinkage void
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default_trap_handler(struct pt_regs * regs, long interruption_code)
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{
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if (regs->psw.mask & PSW_MASK_PSTATE) {
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local_irq_enable();
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do_exit(SIGSEGV);
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report_user_fault(interruption_code, regs);
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} else
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die("Unknown program exception", regs, interruption_code);
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}
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#define DO_ERROR_INFO(signr, str, name, sicode, siaddr) \
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asmlinkage void name(struct pt_regs * regs, long interruption_code) \
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{ \
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siginfo_t info; \
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info.si_signo = signr; \
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info.si_errno = 0; \
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info.si_code = sicode; \
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info.si_addr = (void *)siaddr; \
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do_trap(interruption_code, signr, str, regs, &info); \
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}
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DO_ERROR_INFO(SIGILL, "addressing exception", addressing_exception,
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ILL_ILLADR, get_check_address(regs))
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DO_ERROR_INFO(SIGILL, "execute exception", execute_exception,
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ILL_ILLOPN, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "fixpoint divide exception", divide_exception,
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FPE_INTDIV, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "fixpoint overflow exception", overflow_exception,
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FPE_INTOVF, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP overflow exception", hfp_overflow_exception,
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FPE_FLTOVF, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP underflow exception", hfp_underflow_exception,
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FPE_FLTUND, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP significance exception", hfp_significance_exception,
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FPE_FLTRES, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP divide exception", hfp_divide_exception,
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FPE_FLTDIV, get_check_address(regs))
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DO_ERROR_INFO(SIGFPE, "HFP square root exception", hfp_sqrt_exception,
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FPE_FLTINV, get_check_address(regs))
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DO_ERROR_INFO(SIGILL, "operand exception", operand_exception,
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ILL_ILLOPN, get_check_address(regs))
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DO_ERROR_INFO(SIGILL, "privileged operation", privileged_op,
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ILL_PRVOPC, get_check_address(regs))
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DO_ERROR_INFO(SIGILL, "special operation exception", special_op_exception,
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ILL_ILLOPN, get_check_address(regs))
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DO_ERROR_INFO(SIGILL, "translation exception", translation_exception,
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ILL_ILLOPN, get_check_address(regs))
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static inline void
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do_fp_trap(struct pt_regs *regs, void *location,
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int fpc, long interruption_code)
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{
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siginfo_t si;
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si.si_signo = SIGFPE;
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si.si_errno = 0;
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si.si_addr = location;
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si.si_code = 0;
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/* FPC[2] is Data Exception Code */
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if ((fpc & 0x00000300) == 0) {
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/* bits 6 and 7 of DXC are 0 iff IEEE exception */
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if (fpc & 0x8000) /* invalid fp operation */
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si.si_code = FPE_FLTINV;
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else if (fpc & 0x4000) /* div by 0 */
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si.si_code = FPE_FLTDIV;
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else if (fpc & 0x2000) /* overflow */
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si.si_code = FPE_FLTOVF;
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else if (fpc & 0x1000) /* underflow */
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si.si_code = FPE_FLTUND;
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else if (fpc & 0x0800) /* inexact */
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si.si_code = FPE_FLTRES;
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}
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current->thread.ieee_instruction_pointer = (addr_t) location;
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do_trap(interruption_code, SIGFPE,
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"floating point exception", regs, &si);
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}
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asmlinkage void illegal_op(struct pt_regs * regs, long interruption_code)
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{
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siginfo_t info;
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__u8 opcode[6];
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__u16 *location;
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int signal = 0;
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location = (__u16 *) get_check_address(regs);
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/*
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* We got all needed information from the lowcore and can
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* now safely switch on interrupts.
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*/
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if (regs->psw.mask & PSW_MASK_PSTATE)
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local_irq_enable();
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if (regs->psw.mask & PSW_MASK_PSTATE) {
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get_user(*((__u16 *) opcode), (__u16 __user *) location);
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if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) {
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if (current->ptrace & PT_PTRACED)
|
|
force_sig(SIGTRAP, current);
|
|
else
|
|
signal = SIGILL;
|
|
#ifdef CONFIG_MATHEMU
|
|
} else if (opcode[0] == 0xb3) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_b3(opcode, regs);
|
|
} else if (opcode[0] == 0xed) {
|
|
get_user(*((__u32 *) (opcode+2)),
|
|
(__u32 *)(location+1));
|
|
signal = math_emu_ed(opcode, regs);
|
|
} else if (*((__u16 *) opcode) == 0xb299) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_srnm(opcode, regs);
|
|
} else if (*((__u16 *) opcode) == 0xb29c) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_stfpc(opcode, regs);
|
|
} else if (*((__u16 *) opcode) == 0xb29d) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_lfpc(opcode, regs);
|
|
#endif
|
|
} else
|
|
signal = SIGILL;
|
|
} else
|
|
signal = SIGILL;
|
|
|
|
#ifdef CONFIG_MATHEMU
|
|
if (signal == SIGFPE)
|
|
do_fp_trap(regs, location,
|
|
current->thread.fp_regs.fpc, interruption_code);
|
|
else if (signal == SIGSEGV) {
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = SEGV_MAPERR;
|
|
info.si_addr = (void *) location;
|
|
do_trap(interruption_code, signal,
|
|
"user address fault", regs, &info);
|
|
} else
|
|
#endif
|
|
if (signal) {
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPC;
|
|
info.si_addr = (void *) location;
|
|
do_trap(interruption_code, signal,
|
|
"illegal operation", regs, &info);
|
|
}
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_MATHEMU
|
|
asmlinkage void
|
|
specification_exception(struct pt_regs * regs, long interruption_code)
|
|
{
|
|
__u8 opcode[6];
|
|
__u16 *location = NULL;
|
|
int signal = 0;
|
|
|
|
location = (__u16 *) get_check_address(regs);
|
|
|
|
/*
|
|
* We got all needed information from the lowcore and can
|
|
* now safely switch on interrupts.
|
|
*/
|
|
if (regs->psw.mask & PSW_MASK_PSTATE)
|
|
local_irq_enable();
|
|
|
|
if (regs->psw.mask & PSW_MASK_PSTATE) {
|
|
get_user(*((__u16 *) opcode), location);
|
|
switch (opcode[0]) {
|
|
case 0x28: /* LDR Rx,Ry */
|
|
signal = math_emu_ldr(opcode);
|
|
break;
|
|
case 0x38: /* LER Rx,Ry */
|
|
signal = math_emu_ler(opcode);
|
|
break;
|
|
case 0x60: /* STD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_std(opcode, regs);
|
|
break;
|
|
case 0x68: /* LD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ld(opcode, regs);
|
|
break;
|
|
case 0x70: /* STE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ste(opcode, regs);
|
|
break;
|
|
case 0x78: /* LE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_le(opcode, regs);
|
|
break;
|
|
default:
|
|
signal = SIGILL;
|
|
break;
|
|
}
|
|
} else
|
|
signal = SIGILL;
|
|
|
|
if (signal == SIGFPE)
|
|
do_fp_trap(regs, location,
|
|
current->thread.fp_regs.fpc, interruption_code);
|
|
else if (signal) {
|
|
siginfo_t info;
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPN;
|
|
info.si_addr = location;
|
|
do_trap(interruption_code, signal,
|
|
"specification exception", regs, &info);
|
|
}
|
|
}
|
|
#else
|
|
DO_ERROR_INFO(SIGILL, "specification exception", specification_exception,
|
|
ILL_ILLOPN, get_check_address(regs));
|
|
#endif
|
|
|
|
asmlinkage void data_exception(struct pt_regs * regs, long interruption_code)
|
|
{
|
|
__u16 *location;
|
|
int signal = 0;
|
|
|
|
location = (__u16 *) get_check_address(regs);
|
|
|
|
/*
|
|
* We got all needed information from the lowcore and can
|
|
* now safely switch on interrupts.
|
|
*/
|
|
if (regs->psw.mask & PSW_MASK_PSTATE)
|
|
local_irq_enable();
|
|
|
|
if (MACHINE_HAS_IEEE)
|
|
__asm__ volatile ("stfpc %0\n\t"
|
|
: "=m" (current->thread.fp_regs.fpc));
|
|
|
|
#ifdef CONFIG_MATHEMU
|
|
else if (regs->psw.mask & PSW_MASK_PSTATE) {
|
|
__u8 opcode[6];
|
|
get_user(*((__u16 *) opcode), location);
|
|
switch (opcode[0]) {
|
|
case 0x28: /* LDR Rx,Ry */
|
|
signal = math_emu_ldr(opcode);
|
|
break;
|
|
case 0x38: /* LER Rx,Ry */
|
|
signal = math_emu_ler(opcode);
|
|
break;
|
|
case 0x60: /* STD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_std(opcode, regs);
|
|
break;
|
|
case 0x68: /* LD R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ld(opcode, regs);
|
|
break;
|
|
case 0x70: /* STE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_ste(opcode, regs);
|
|
break;
|
|
case 0x78: /* LE R,D(X,B) */
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_le(opcode, regs);
|
|
break;
|
|
case 0xb3:
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_b3(opcode, regs);
|
|
break;
|
|
case 0xed:
|
|
get_user(*((__u32 *) (opcode+2)),
|
|
(__u32 *)(location+1));
|
|
signal = math_emu_ed(opcode, regs);
|
|
break;
|
|
case 0xb2:
|
|
if (opcode[1] == 0x99) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_srnm(opcode, regs);
|
|
} else if (opcode[1] == 0x9c) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_stfpc(opcode, regs);
|
|
} else if (opcode[1] == 0x9d) {
|
|
get_user(*((__u16 *) (opcode+2)), location+1);
|
|
signal = math_emu_lfpc(opcode, regs);
|
|
} else
|
|
signal = SIGILL;
|
|
break;
|
|
default:
|
|
signal = SIGILL;
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
if (current->thread.fp_regs.fpc & FPC_DXC_MASK)
|
|
signal = SIGFPE;
|
|
else
|
|
signal = SIGILL;
|
|
if (signal == SIGFPE)
|
|
do_fp_trap(regs, location,
|
|
current->thread.fp_regs.fpc, interruption_code);
|
|
else if (signal) {
|
|
siginfo_t info;
|
|
info.si_signo = signal;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPN;
|
|
info.si_addr = location;
|
|
do_trap(interruption_code, signal,
|
|
"data exception", regs, &info);
|
|
}
|
|
}
|
|
|
|
asmlinkage void space_switch_exception(struct pt_regs * regs, long int_code)
|
|
{
|
|
siginfo_t info;
|
|
|
|
/* Set user psw back to home space mode. */
|
|
if (regs->psw.mask & PSW_MASK_PSTATE)
|
|
regs->psw.mask |= PSW_ASC_HOME;
|
|
/* Send SIGILL. */
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_PRVOPC;
|
|
info.si_addr = get_check_address(regs);
|
|
do_trap(int_code, SIGILL, "space switch event", regs, &info);
|
|
}
|
|
|
|
asmlinkage void kernel_stack_overflow(struct pt_regs * regs)
|
|
{
|
|
bust_spinlocks(1);
|
|
printk("Kernel stack overflow.\n");
|
|
show_regs(regs);
|
|
bust_spinlocks(0);
|
|
panic("Corrupt kernel stack, can't continue.");
|
|
}
|
|
|
|
|
|
/* init is done in lowcore.S and head.S */
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 128; i++)
|
|
pgm_check_table[i] = &default_trap_handler;
|
|
pgm_check_table[1] = &illegal_op;
|
|
pgm_check_table[2] = &privileged_op;
|
|
pgm_check_table[3] = &execute_exception;
|
|
pgm_check_table[4] = &do_protection_exception;
|
|
pgm_check_table[5] = &addressing_exception;
|
|
pgm_check_table[6] = &specification_exception;
|
|
pgm_check_table[7] = &data_exception;
|
|
pgm_check_table[8] = &overflow_exception;
|
|
pgm_check_table[9] = ÷_exception;
|
|
pgm_check_table[0x0A] = &overflow_exception;
|
|
pgm_check_table[0x0B] = ÷_exception;
|
|
pgm_check_table[0x0C] = &hfp_overflow_exception;
|
|
pgm_check_table[0x0D] = &hfp_underflow_exception;
|
|
pgm_check_table[0x0E] = &hfp_significance_exception;
|
|
pgm_check_table[0x0F] = &hfp_divide_exception;
|
|
pgm_check_table[0x10] = &do_dat_exception;
|
|
pgm_check_table[0x11] = &do_dat_exception;
|
|
pgm_check_table[0x12] = &translation_exception;
|
|
pgm_check_table[0x13] = &special_op_exception;
|
|
#ifndef CONFIG_ARCH_S390X
|
|
pgm_check_table[0x14] = &do_pseudo_page_fault;
|
|
#else /* CONFIG_ARCH_S390X */
|
|
pgm_check_table[0x38] = &do_dat_exception;
|
|
pgm_check_table[0x39] = &do_dat_exception;
|
|
pgm_check_table[0x3A] = &do_dat_exception;
|
|
pgm_check_table[0x3B] = &do_dat_exception;
|
|
#endif /* CONFIG_ARCH_S390X */
|
|
pgm_check_table[0x15] = &operand_exception;
|
|
pgm_check_table[0x1C] = &space_switch_exception;
|
|
pgm_check_table[0x1D] = &hfp_sqrt_exception;
|
|
pgm_check_table[0x40] = &do_monitor_call;
|
|
|
|
if (MACHINE_IS_VM) {
|
|
/*
|
|
* First try to get pfault pseudo page faults going.
|
|
* If this isn't available turn on pagex page faults.
|
|
*/
|
|
#ifdef CONFIG_PFAULT
|
|
/* request the 0x2603 external interrupt */
|
|
if (register_early_external_interrupt(0x2603, pfault_interrupt,
|
|
&ext_int_pfault) != 0)
|
|
panic("Couldn't request external interrupt 0x2603");
|
|
|
|
if (pfault_init() == 0)
|
|
return;
|
|
|
|
/* Tough luck, no pfault. */
|
|
unregister_early_external_interrupt(0x2603, pfault_interrupt,
|
|
&ext_int_pfault);
|
|
#endif
|
|
#ifndef CONFIG_ARCH_S390X
|
|
cpcmd("SET PAGEX ON", NULL, 0);
|
|
#endif
|
|
}
|
|
}
|