forked from luck/tmp_suning_uos_patched
6a82e23f45
Linux-next commit titled "perf/core: Optimize perf_init_event()" changed the semantics of PMU device driver registration. It was done to speed up the lookup/handling of PMU device driver specific events. It also enforces that only one PMU device driver will be registered of type PERF_EVENT_RAW. This change added these line in function perf_pmu_register(): ... + ret = idr_alloc(&pmu_idr, pmu, max, 0, GFP_KERNEL); + if (ret < 0) goto free_pdc; + + WARN_ON(type >= 0 && ret != type); The warn_on generates a message. We have 3 PMU device drivers, each registered as type PERF_TYPE_RAW. The cf_diag device driver (arch/s390/kernel/perf_cpumf_cf_diag.c) always hits the WARN_ON because it is the second PMU device driver (after sampling device driver arch/s390/kernel/perf_cpumf_sf.c) which is registered as type 4 (PERF_TYPE_RAW). So when the sampling device driver is registered, ret has value 4. When cf_diag device driver is registered with type 4, ret has value of 5 and WARN_ON fires. Adjust the PMU device drivers for s390 to support the new semantics required by perf_pmu_register(). Signed-off-by: Thomas Richter <tmricht@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
706 lines
21 KiB
C
706 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Performance event support for s390x - CPU-measurement Counter Sets
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*
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* Copyright IBM Corp. 2019
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* Author(s): Hendrik Brueckner <brueckner@linux.ibm.com>
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* Thomas Richer <tmricht@linux.ibm.com>
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*/
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#define KMSG_COMPONENT "cpum_cf_diag"
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
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#include <linux/kernel.h>
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#include <linux/kernel_stat.h>
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#include <linux/percpu.h>
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#include <linux/notifier.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/processor.h>
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#include <asm/ctl_reg.h>
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#include <asm/irq.h>
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#include <asm/cpu_mcf.h>
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#include <asm/timex.h>
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#include <asm/debug.h>
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#define CF_DIAG_CTRSET_DEF 0xfeef /* Counter set header mark */
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static unsigned int cf_diag_cpu_speed;
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static debug_info_t *cf_diag_dbg;
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struct cf_diag_csd { /* Counter set data per CPU */
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size_t used; /* Bytes used in data/start */
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unsigned char start[PAGE_SIZE]; /* Counter set at event start */
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unsigned char data[PAGE_SIZE]; /* Counter set at event delete */
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};
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static DEFINE_PER_CPU(struct cf_diag_csd, cf_diag_csd);
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/* Counter sets are stored as data stream in a page sized memory buffer and
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* exported to user space via raw data attached to the event sample data.
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* Each counter set starts with an eight byte header consisting of:
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* - a two byte eye catcher (0xfeef)
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* - a one byte counter set number
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* - a two byte counter set size (indicates the number of counters in this set)
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* - a three byte reserved value (must be zero) to make the header the same
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* size as a counter value.
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* All counter values are eight byte in size.
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*
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* All counter sets are followed by a 64 byte trailer.
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* The trailer consists of a:
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* - flag field indicating valid fields when corresponding bit set
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* - the counter facility first and second version number
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* - the CPU speed if nonzero
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* - the time stamp the counter sets have been collected
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* - the time of day (TOD) base value
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* - the machine type.
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*
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* The counter sets are saved when the process is prepared to be executed on a
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* CPU and saved again when the process is going to be removed from a CPU.
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* The difference of both counter sets are calculated and stored in the event
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* sample data area.
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*/
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struct cf_ctrset_entry { /* CPU-M CF counter set entry (8 byte) */
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unsigned int def:16; /* 0-15 Data Entry Format */
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unsigned int set:16; /* 16-31 Counter set identifier */
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unsigned int ctr:16; /* 32-47 Number of stored counters */
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unsigned int res1:16; /* 48-63 Reserved */
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};
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struct cf_trailer_entry { /* CPU-M CF_DIAG trailer (64 byte) */
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/* 0 - 7 */
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union {
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struct {
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unsigned int clock_base:1; /* TOD clock base set */
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unsigned int speed:1; /* CPU speed set */
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/* Measurement alerts */
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unsigned int mtda:1; /* Loss of MT ctr. data alert */
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unsigned int caca:1; /* Counter auth. change alert */
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unsigned int lcda:1; /* Loss of counter data alert */
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};
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unsigned long flags; /* 0-63 All indicators */
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};
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/* 8 - 15 */
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unsigned int cfvn:16; /* 64-79 Ctr First Version */
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unsigned int csvn:16; /* 80-95 Ctr Second Version */
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unsigned int cpu_speed:32; /* 96-127 CPU speed */
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/* 16 - 23 */
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unsigned long timestamp; /* 128-191 Timestamp (TOD) */
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/* 24 - 55 */
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union {
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struct {
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unsigned long progusage1;
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unsigned long progusage2;
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unsigned long progusage3;
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unsigned long tod_base;
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};
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unsigned long progusage[4];
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};
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/* 56 - 63 */
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unsigned int mach_type:16; /* Machine type */
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unsigned int res1:16; /* Reserved */
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unsigned int res2:32; /* Reserved */
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};
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/* Create the trailer data at the end of a page. */
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static void cf_diag_trailer(struct cf_trailer_entry *te)
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{
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struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
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struct cpuid cpuid;
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te->cfvn = cpuhw->info.cfvn; /* Counter version numbers */
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te->csvn = cpuhw->info.csvn;
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get_cpu_id(&cpuid); /* Machine type */
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te->mach_type = cpuid.machine;
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te->cpu_speed = cf_diag_cpu_speed;
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if (te->cpu_speed)
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te->speed = 1;
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te->clock_base = 1; /* Save clock base */
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memcpy(&te->tod_base, &tod_clock_base[1], 8);
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store_tod_clock((__u64 *)&te->timestamp);
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}
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/*
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* Change the CPUMF state to active.
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* Enable and activate the CPU-counter sets according
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* to the per-cpu control state.
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*/
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static void cf_diag_enable(struct pmu *pmu)
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{
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struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
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int err;
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debug_sprintf_event(cf_diag_dbg, 5,
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"%s pmu %p cpu %d flags %#x state %#llx\n",
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__func__, pmu, smp_processor_id(), cpuhw->flags,
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cpuhw->state);
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if (cpuhw->flags & PMU_F_ENABLED)
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return;
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err = lcctl(cpuhw->state);
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if (err) {
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pr_err("Enabling the performance measuring unit "
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"failed with rc=%x\n", err);
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return;
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}
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cpuhw->flags |= PMU_F_ENABLED;
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}
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/*
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* Change the CPUMF state to inactive.
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* Disable and enable (inactive) the CPU-counter sets according
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* to the per-cpu control state.
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*/
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static void cf_diag_disable(struct pmu *pmu)
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{
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struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
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u64 inactive;
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int err;
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debug_sprintf_event(cf_diag_dbg, 5,
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"%s pmu %p cpu %d flags %#x state %#llx\n",
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__func__, pmu, smp_processor_id(), cpuhw->flags,
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cpuhw->state);
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if (!(cpuhw->flags & PMU_F_ENABLED))
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return;
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inactive = cpuhw->state & ~((1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1);
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err = lcctl(inactive);
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if (err) {
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pr_err("Disabling the performance measuring unit "
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"failed with rc=%x\n", err);
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return;
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}
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cpuhw->flags &= ~PMU_F_ENABLED;
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}
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/* Number of perf events counting hardware events */
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static atomic_t cf_diag_events = ATOMIC_INIT(0);
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/* Release the PMU if event is the last perf event */
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static void cf_diag_perf_event_destroy(struct perf_event *event)
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{
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debug_sprintf_event(cf_diag_dbg, 5,
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"%s event %p cpu %d cf_diag_events %d\n",
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__func__, event, event->cpu,
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atomic_read(&cf_diag_events));
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if (atomic_dec_return(&cf_diag_events) == 0)
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__kernel_cpumcf_end();
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}
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/* Setup the event. Test for authorized counter sets and only include counter
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* sets which are authorized at the time of the setup. Including unauthorized
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* counter sets result in specification exception (and panic).
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*/
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static int __hw_perf_event_init(struct perf_event *event)
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{
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struct perf_event_attr *attr = &event->attr;
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struct cpu_cf_events *cpuhw;
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enum cpumf_ctr_set i;
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int err = 0;
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debug_sprintf_event(cf_diag_dbg, 5, "%s event %p cpu %d\n", __func__,
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event, event->cpu);
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event->hw.config = attr->config;
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event->hw.config_base = 0;
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/* Add all authorized counter sets to config_base. The
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* the hardware init function is either called per-cpu or just once
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* for all CPUS (event->cpu == -1). This depends on the whether
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* counting is started for all CPUs or on a per workload base where
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* the perf event moves from one CPU to another CPU.
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* Checking the authorization on any CPU is fine as the hardware
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* applies the same authorization settings to all CPUs.
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*/
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cpuhw = &get_cpu_var(cpu_cf_events);
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for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i)
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if (cpuhw->info.auth_ctl & cpumf_ctr_ctl[i])
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event->hw.config_base |= cpumf_ctr_ctl[i];
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put_cpu_var(cpu_cf_events);
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/* No authorized counter sets, nothing to count/sample */
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if (!event->hw.config_base) {
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err = -EINVAL;
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goto out;
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}
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/* Set sample_period to indicate sampling */
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event->hw.sample_period = attr->sample_period;
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local64_set(&event->hw.period_left, event->hw.sample_period);
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event->hw.last_period = event->hw.sample_period;
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out:
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debug_sprintf_event(cf_diag_dbg, 5, "%s err %d config_base %#lx\n",
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__func__, err, event->hw.config_base);
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return err;
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}
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static int cf_diag_event_init(struct perf_event *event)
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{
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struct perf_event_attr *attr = &event->attr;
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int err = -ENOENT;
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debug_sprintf_event(cf_diag_dbg, 5,
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"%s event %p cpu %d config %#llx type:%u "
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"sample_type %#llx cf_diag_events %d\n", __func__,
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event, event->cpu, attr->config, event->pmu->type,
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attr->sample_type, atomic_read(&cf_diag_events));
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if (event->attr.config != PERF_EVENT_CPUM_CF_DIAG ||
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event->attr.type != event->pmu->type)
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goto out;
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/* Raw events are used to access counters directly,
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* hence do not permit excludes.
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* This event is usesless without PERF_SAMPLE_RAW to return counter set
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* values as raw data.
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*/
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if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv ||
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!(attr->sample_type & (PERF_SAMPLE_CPU | PERF_SAMPLE_RAW))) {
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err = -EOPNOTSUPP;
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goto out;
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}
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/* Initialize for using the CPU-measurement counter facility */
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if (atomic_inc_return(&cf_diag_events) == 1) {
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if (__kernel_cpumcf_begin()) {
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atomic_dec(&cf_diag_events);
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err = -EBUSY;
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goto out;
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}
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}
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event->destroy = cf_diag_perf_event_destroy;
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err = __hw_perf_event_init(event);
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if (unlikely(err))
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event->destroy(event);
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out:
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debug_sprintf_event(cf_diag_dbg, 5, "%s err %d\n", __func__, err);
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return err;
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}
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static void cf_diag_read(struct perf_event *event)
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{
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debug_sprintf_event(cf_diag_dbg, 5, "%s event %p\n", __func__, event);
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}
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/* Return the maximum possible counter set size (in number of 8 byte counters)
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* depending on type and model number.
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*/
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static size_t cf_diag_ctrset_size(enum cpumf_ctr_set ctrset,
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struct cpumf_ctr_info *info)
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{
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size_t ctrset_size = 0;
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switch (ctrset) {
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case CPUMF_CTR_SET_BASIC:
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if (info->cfvn >= 1)
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ctrset_size = 6;
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break;
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case CPUMF_CTR_SET_USER:
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if (info->cfvn == 1)
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ctrset_size = 6;
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else if (info->cfvn >= 3)
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ctrset_size = 2;
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break;
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case CPUMF_CTR_SET_CRYPTO:
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if (info->csvn >= 1 && info->csvn <= 5)
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ctrset_size = 16;
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else if (info->csvn == 6)
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ctrset_size = 20;
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break;
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case CPUMF_CTR_SET_EXT:
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if (info->csvn == 1)
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ctrset_size = 32;
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else if (info->csvn == 2)
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ctrset_size = 48;
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else if (info->csvn >= 3 && info->csvn <= 5)
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ctrset_size = 128;
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else if (info->csvn == 6)
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ctrset_size = 160;
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break;
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case CPUMF_CTR_SET_MT_DIAG:
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if (info->csvn > 3)
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ctrset_size = 48;
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break;
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case CPUMF_CTR_SET_MAX:
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break;
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}
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return ctrset_size;
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}
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/* Calculate memory needed to store all counter sets together with header and
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* trailer data. This is independend of the counter set authorization which
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* can vary depending on the configuration.
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*/
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static size_t cf_diag_ctrset_maxsize(struct cpumf_ctr_info *info)
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{
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size_t max_size = sizeof(struct cf_trailer_entry);
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enum cpumf_ctr_set i;
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for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
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size_t size = cf_diag_ctrset_size(i, info);
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if (size)
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max_size += size * sizeof(u64) +
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sizeof(struct cf_ctrset_entry);
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}
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debug_sprintf_event(cf_diag_dbg, 5, "%s max_size %zu\n", __func__,
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max_size);
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return max_size;
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}
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/* Read a counter set. The counter set number determines which counter set and
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* the CPUM-CF first and second version number determine the number of
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* available counters in this counter set.
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* Each counter set starts with header containing the counter set number and
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* the number of 8 byte counters.
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*
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* The functions returns the number of bytes occupied by this counter set
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* including the header.
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* If there is no counter in the counter set, this counter set is useless and
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* zero is returned on this case.
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*/
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static size_t cf_diag_getctrset(struct cf_ctrset_entry *ctrdata, int ctrset,
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size_t room)
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{
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struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
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size_t ctrset_size, need = 0;
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int rc = 3; /* Assume write failure */
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ctrdata->def = CF_DIAG_CTRSET_DEF;
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ctrdata->set = ctrset;
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ctrdata->res1 = 0;
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ctrset_size = cf_diag_ctrset_size(ctrset, &cpuhw->info);
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if (ctrset_size) { /* Save data */
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need = ctrset_size * sizeof(u64) + sizeof(*ctrdata);
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if (need <= room)
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rc = ctr_stcctm(ctrset, ctrset_size,
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(u64 *)(ctrdata + 1));
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if (rc != 3)
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ctrdata->ctr = ctrset_size;
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else
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need = 0;
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}
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debug_sprintf_event(cf_diag_dbg, 6,
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"%s ctrset %d ctrset_size %zu cfvn %d csvn %d"
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" need %zd rc %d\n",
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__func__, ctrset, ctrset_size, cpuhw->info.cfvn,
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cpuhw->info.csvn, need, rc);
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return need;
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}
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/* Read out all counter sets and save them in the provided data buffer.
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* The last 64 byte host an artificial trailer entry.
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*/
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static size_t cf_diag_getctr(void *data, size_t sz, unsigned long auth)
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{
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struct cf_trailer_entry *trailer;
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size_t offset = 0, done;
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int i;
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memset(data, 0, sz);
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sz -= sizeof(*trailer); /* Always room for trailer */
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for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
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struct cf_ctrset_entry *ctrdata = data + offset;
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if (!(auth & cpumf_ctr_ctl[i]))
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continue; /* Counter set not authorized */
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done = cf_diag_getctrset(ctrdata, i, sz - offset);
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offset += done;
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debug_sprintf_event(cf_diag_dbg, 6,
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"%s ctrset %d offset %zu done %zu\n",
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__func__, i, offset, done);
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}
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trailer = data + offset;
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cf_diag_trailer(trailer);
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return offset + sizeof(*trailer);
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}
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/* Calculate the difference for each counter in a counter set. */
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static void cf_diag_diffctrset(u64 *pstart, u64 *pstop, int counters)
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{
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for (; --counters >= 0; ++pstart, ++pstop)
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if (*pstop >= *pstart)
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*pstop -= *pstart;
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else
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*pstop = *pstart - *pstop;
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}
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/* Scan the counter sets and calculate the difference of each counter
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* in each set. The result is the increment of each counter during the
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* period the counter set has been activated.
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*
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* Return true on success.
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*/
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static int cf_diag_diffctr(struct cf_diag_csd *csd, unsigned long auth)
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{
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struct cf_trailer_entry *trailer_start, *trailer_stop;
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struct cf_ctrset_entry *ctrstart, *ctrstop;
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size_t offset = 0;
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auth &= (1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1;
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do {
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ctrstart = (struct cf_ctrset_entry *)(csd->start + offset);
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ctrstop = (struct cf_ctrset_entry *)(csd->data + offset);
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if (memcmp(ctrstop, ctrstart, sizeof(*ctrstop))) {
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pr_err("cpum_cf_diag counter set compare error "
|
|
"in set %i\n", ctrstart->set);
|
|
return 0;
|
|
}
|
|
auth &= ~cpumf_ctr_ctl[ctrstart->set];
|
|
if (ctrstart->def == CF_DIAG_CTRSET_DEF) {
|
|
cf_diag_diffctrset((u64 *)(ctrstart + 1),
|
|
(u64 *)(ctrstop + 1), ctrstart->ctr);
|
|
offset += ctrstart->ctr * sizeof(u64) +
|
|
sizeof(*ctrstart);
|
|
}
|
|
debug_sprintf_event(cf_diag_dbg, 6,
|
|
"%s set %d ctr %d offset %zu auth %lx\n",
|
|
__func__, ctrstart->set, ctrstart->ctr,
|
|
offset, auth);
|
|
} while (ctrstart->def && auth);
|
|
|
|
/* Save time_stamp from start of event in stop's trailer */
|
|
trailer_start = (struct cf_trailer_entry *)(csd->start + offset);
|
|
trailer_stop = (struct cf_trailer_entry *)(csd->data + offset);
|
|
trailer_stop->progusage[0] = trailer_start->timestamp;
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Create perf event sample with the counter sets as raw data. The sample
|
|
* is then pushed to the event subsystem and the function checks for
|
|
* possible event overflows. If an event overflow occurs, the PMU is
|
|
* stopped.
|
|
*
|
|
* Return non-zero if an event overflow occurred.
|
|
*/
|
|
static int cf_diag_push_sample(struct perf_event *event,
|
|
struct cf_diag_csd *csd)
|
|
{
|
|
struct perf_sample_data data;
|
|
struct perf_raw_record raw;
|
|
struct pt_regs regs;
|
|
int overflow;
|
|
|
|
/* Setup perf sample */
|
|
perf_sample_data_init(&data, 0, event->hw.last_period);
|
|
memset(®s, 0, sizeof(regs));
|
|
memset(&raw, 0, sizeof(raw));
|
|
|
|
if (event->attr.sample_type & PERF_SAMPLE_CPU)
|
|
data.cpu_entry.cpu = event->cpu;
|
|
if (event->attr.sample_type & PERF_SAMPLE_RAW) {
|
|
raw.frag.size = csd->used;
|
|
raw.frag.data = csd->data;
|
|
raw.size = csd->used;
|
|
data.raw = &raw;
|
|
}
|
|
|
|
overflow = perf_event_overflow(event, &data, ®s);
|
|
debug_sprintf_event(cf_diag_dbg, 6,
|
|
"%s event %p cpu %d sample_type %#llx raw %d "
|
|
"ov %d\n", __func__, event, event->cpu,
|
|
event->attr.sample_type, raw.size, overflow);
|
|
if (overflow)
|
|
event->pmu->stop(event, 0);
|
|
|
|
perf_event_update_userpage(event);
|
|
return overflow;
|
|
}
|
|
|
|
static void cf_diag_start(struct perf_event *event, int flags)
|
|
{
|
|
struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
|
|
struct cf_diag_csd *csd = this_cpu_ptr(&cf_diag_csd);
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
debug_sprintf_event(cf_diag_dbg, 5,
|
|
"%s event %p cpu %d flags %#x hwc-state %#x\n",
|
|
__func__, event, event->cpu, flags, hwc->state);
|
|
if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
|
|
return;
|
|
|
|
/* (Re-)enable and activate all counter sets */
|
|
lcctl(0); /* Reset counter sets */
|
|
hwc->state = 0;
|
|
ctr_set_multiple_enable(&cpuhw->state, hwc->config_base);
|
|
lcctl(cpuhw->state); /* Enable counter sets */
|
|
csd->used = cf_diag_getctr(csd->start, sizeof(csd->start),
|
|
event->hw.config_base);
|
|
ctr_set_multiple_start(&cpuhw->state, hwc->config_base);
|
|
/* Function cf_diag_enable() starts the counter sets. */
|
|
}
|
|
|
|
static void cf_diag_stop(struct perf_event *event, int flags)
|
|
{
|
|
struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
|
|
struct cf_diag_csd *csd = this_cpu_ptr(&cf_diag_csd);
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
debug_sprintf_event(cf_diag_dbg, 5,
|
|
"%s event %p cpu %d flags %#x hwc-state %#x\n",
|
|
__func__, event, event->cpu, flags, hwc->state);
|
|
|
|
/* Deactivate all counter sets */
|
|
ctr_set_multiple_stop(&cpuhw->state, hwc->config_base);
|
|
local64_inc(&event->count);
|
|
csd->used = cf_diag_getctr(csd->data, sizeof(csd->data),
|
|
event->hw.config_base);
|
|
if (cf_diag_diffctr(csd, event->hw.config_base))
|
|
cf_diag_push_sample(event, csd);
|
|
hwc->state |= PERF_HES_STOPPED;
|
|
}
|
|
|
|
static int cf_diag_add(struct perf_event *event, int flags)
|
|
{
|
|
struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
|
|
int err = 0;
|
|
|
|
debug_sprintf_event(cf_diag_dbg, 5,
|
|
"%s event %p cpu %d flags %#x cpuhw %p\n",
|
|
__func__, event, event->cpu, flags, cpuhw);
|
|
|
|
if (cpuhw->flags & PMU_F_IN_USE) {
|
|
err = -EAGAIN;
|
|
goto out;
|
|
}
|
|
|
|
event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
|
|
|
|
cpuhw->flags |= PMU_F_IN_USE;
|
|
if (flags & PERF_EF_START)
|
|
cf_diag_start(event, PERF_EF_RELOAD);
|
|
out:
|
|
debug_sprintf_event(cf_diag_dbg, 5, "%s err %d\n", __func__, err);
|
|
return err;
|
|
}
|
|
|
|
static void cf_diag_del(struct perf_event *event, int flags)
|
|
{
|
|
struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
|
|
|
|
debug_sprintf_event(cf_diag_dbg, 5,
|
|
"%s event %p cpu %d flags %#x\n",
|
|
__func__, event, event->cpu, flags);
|
|
|
|
cf_diag_stop(event, PERF_EF_UPDATE);
|
|
ctr_set_multiple_stop(&cpuhw->state, event->hw.config_base);
|
|
ctr_set_multiple_disable(&cpuhw->state, event->hw.config_base);
|
|
cpuhw->flags &= ~PMU_F_IN_USE;
|
|
}
|
|
|
|
CPUMF_EVENT_ATTR(CF_DIAG, CF_DIAG, PERF_EVENT_CPUM_CF_DIAG);
|
|
|
|
static struct attribute *cf_diag_events_attr[] = {
|
|
CPUMF_EVENT_PTR(CF_DIAG, CF_DIAG),
|
|
NULL,
|
|
};
|
|
|
|
PMU_FORMAT_ATTR(event, "config:0-63");
|
|
|
|
static struct attribute *cf_diag_format_attr[] = {
|
|
&format_attr_event.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group cf_diag_events_group = {
|
|
.name = "events",
|
|
.attrs = cf_diag_events_attr,
|
|
};
|
|
static struct attribute_group cf_diag_format_group = {
|
|
.name = "format",
|
|
.attrs = cf_diag_format_attr,
|
|
};
|
|
static const struct attribute_group *cf_diag_attr_groups[] = {
|
|
&cf_diag_events_group,
|
|
&cf_diag_format_group,
|
|
NULL,
|
|
};
|
|
|
|
/* Performance monitoring unit for s390x */
|
|
static struct pmu cf_diag = {
|
|
.task_ctx_nr = perf_sw_context,
|
|
.pmu_enable = cf_diag_enable,
|
|
.pmu_disable = cf_diag_disable,
|
|
.event_init = cf_diag_event_init,
|
|
.add = cf_diag_add,
|
|
.del = cf_diag_del,
|
|
.start = cf_diag_start,
|
|
.stop = cf_diag_stop,
|
|
.read = cf_diag_read,
|
|
|
|
.attr_groups = cf_diag_attr_groups
|
|
};
|
|
|
|
/* Get the CPU speed, try sampling facility first and CPU attributes second. */
|
|
static void cf_diag_get_cpu_speed(void)
|
|
{
|
|
if (cpum_sf_avail()) { /* Sampling facility first */
|
|
struct hws_qsi_info_block si;
|
|
|
|
memset(&si, 0, sizeof(si));
|
|
if (!qsi(&si)) {
|
|
cf_diag_cpu_speed = si.cpu_speed;
|
|
return;
|
|
}
|
|
}
|
|
|
|
if (test_facility(34)) { /* CPU speed extract static part */
|
|
unsigned long mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
|
|
|
|
if (mhz != -1UL)
|
|
cf_diag_cpu_speed = mhz & 0xffffffff;
|
|
}
|
|
}
|
|
|
|
/* Initialize the counter set PMU to generate complete counter set data as
|
|
* event raw data. This relies on the CPU Measurement Counter Facility device
|
|
* already being loaded and initialized.
|
|
*/
|
|
static int __init cf_diag_init(void)
|
|
{
|
|
struct cpumf_ctr_info info;
|
|
size_t need;
|
|
int rc;
|
|
|
|
if (!kernel_cpumcf_avail() || !stccm_avail() || qctri(&info))
|
|
return -ENODEV;
|
|
cf_diag_get_cpu_speed();
|
|
|
|
/* Make sure the counter set data fits into predefined buffer. */
|
|
need = cf_diag_ctrset_maxsize(&info);
|
|
if (need > sizeof(((struct cf_diag_csd *)0)->start)) {
|
|
pr_err("Insufficient memory for PMU(cpum_cf_diag) need=%zu\n",
|
|
need);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* Setup s390dbf facility */
|
|
cf_diag_dbg = debug_register(KMSG_COMPONENT, 2, 1, 128);
|
|
if (!cf_diag_dbg) {
|
|
pr_err("Registration of s390dbf(cpum_cf_diag) failed\n");
|
|
return -ENOMEM;
|
|
}
|
|
debug_register_view(cf_diag_dbg, &debug_sprintf_view);
|
|
|
|
rc = perf_pmu_register(&cf_diag, "cpum_cf_diag", -1);
|
|
if (rc) {
|
|
debug_unregister_view(cf_diag_dbg, &debug_sprintf_view);
|
|
debug_unregister(cf_diag_dbg);
|
|
pr_err("Registration of PMU(cpum_cf_diag) failed with rc=%i\n",
|
|
rc);
|
|
}
|
|
return rc;
|
|
}
|
|
arch_initcall(cf_diag_init);
|