forked from luck/tmp_suning_uos_patched
58f7381c97
Add power domain indices for RZ/G1H (R8A7742) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1587678050-23468-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
30 lines
835 B
C
30 lines
835 B
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2020 Renesas Electronics Corp.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7742_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7742_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7742_PD_CA15_CPU0 0
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#define R8A7742_PD_CA15_CPU1 1
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#define R8A7742_PD_CA15_CPU2 2
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#define R8A7742_PD_CA15_CPU3 3
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#define R8A7742_PD_CA7_CPU0 5
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#define R8A7742_PD_CA7_CPU1 6
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#define R8A7742_PD_CA7_CPU2 7
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#define R8A7742_PD_CA7_CPU3 8
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#define R8A7742_PD_CA15_SCU 12
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#define R8A7742_PD_RGX 20
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#define R8A7742_PD_CA7_SCU 21
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/* Always-on power area */
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#define R8A7742_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7742_SYSC_H__ */
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