forked from luck/tmp_suning_uos_patched
f8264e3496
We plan to use hierarchy irqdomain to suppport CPU vector assignment, interrupt remapping controller, IO-APIC controller, MSI interrupt and hypertransport interrupt etc on x86 platforms. So extend irqdomain interfaces to support hierarchy irqdomain. There are already many clients of current irqdomain interfaces. To minimize the changes, we choose to introduce new version 2 interfaces to support hierarchy instead of extending existing irqdomain interfaces. According to Thomas's suggestion, the most important design decision is to build hierarchy struct irq_data to support hierarchy irqdomain, so hierarchy irqdomain related data could be saved in struct irq_data. With support of hierarchy irq_data, we could also support stacked irq_chips. This is most useful in case of set_affinity(). The new hierarchy irqdomain introduces following interfaces: 1) irq_domain_alloc_irqs()/irq_domain_free_irqs(): allocate/release IRQ and related resources. 2) __irq_domain_alloc_irqs(): a special version to support legacy IRQs. 3) irq_domain_activate_irq()/irq_domain_deactivate_irq(): program interrupt controllers to activate/deactivate interrupt. There are also several help functions to ease irqdomain implemenations: 1) irq_domain_get_irq_data(): get irq_data associated with a specific irqdomain. 2) irq_domain_set_hwirq_and_chip(): save irqdomain specific data into irq_data. 3) irq_domain_alloc_irqs_parent()/irq_domain_free_irqs_parent(): invoke parent irqdomain's alloc/free callbacks. We also changed irq_startup()/irq_shutdown() to invoke irq_domain_activate_irq()/irq_domain_deactivate_irq() to program interrupt controller when start/stop interrupts. [ tglx: Folded parts of the later patch series in ] Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Yingjoe Chen <yingjoe.chen@mediatek.com> Cc: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
94 lines
2.3 KiB
Plaintext
94 lines
2.3 KiB
Plaintext
menu "IRQ subsystem"
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# Options selectable by the architecture code
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# Make sparse irq Kconfig switch below available
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config MAY_HAVE_SPARSE_IRQ
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bool
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# Legacy support, required for itanic
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config GENERIC_IRQ_LEGACY
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bool
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# Enable the generic irq autoprobe mechanism
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config GENERIC_IRQ_PROBE
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bool
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# Use the generic /proc/interrupts implementation
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config GENERIC_IRQ_SHOW
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bool
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# Print level/edge extra information
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config GENERIC_IRQ_SHOW_LEVEL
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bool
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# Facility to allocate a hardware interrupt. This is legacy support
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# and should not be used in new code. Use irq domains instead.
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config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
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bool
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# Support for delayed migration from interrupt context
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config GENERIC_PENDING_IRQ
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bool
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# Alpha specific irq affinity mechanism
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config AUTO_IRQ_AFFINITY
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bool
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# Tasklet based software resend for pending interrupts on enable_irq()
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config HARDIRQS_SW_RESEND
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bool
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# Preflow handler support for fasteoi (sparc64)
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config IRQ_PREFLOW_FASTEOI
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bool
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# Edge style eoi based handler (cell)
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config IRQ_EDGE_EOI_HANDLER
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bool
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# Generic configurable interrupt chip implementation
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config GENERIC_IRQ_CHIP
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bool
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select IRQ_DOMAIN
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# Generic irq_domain hw <--> linux irq number translation
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config IRQ_DOMAIN
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bool
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# Support for hierarchical irq domains
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config IRQ_DOMAIN_HIERARCHY
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bool
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select IRQ_DOMAIN
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config HANDLE_DOMAIN_IRQ
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bool
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config IRQ_DOMAIN_DEBUG
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bool "Expose hardware/virtual IRQ mapping via debugfs"
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depends on IRQ_DOMAIN && DEBUG_FS
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help
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This option will show the mapping relationship between hardware irq
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numbers and Linux irq numbers. The mapping is exposed via debugfs
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in the file "irq_domain_mapping".
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If you don't know what this means you don't need it.
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# Support forced irq threading
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config IRQ_FORCED_THREADING
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bool
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config SPARSE_IRQ
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bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
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---help---
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Sparse irq numbering is useful for distro kernels that want
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to define a high CONFIG_NR_CPUS value but still want to have
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low kernel memory footprint on smaller machines.
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( Sparse irqs can also be beneficial on NUMA boxes, as they spread
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out the interrupt descriptors in a more NUMA-friendly way. )
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If you don't know what to do here, say N.
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endmenu
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