forked from luck/tmp_suning_uos_patched
dbdc025bb2
The IIO DAC drivers are in a reasonably good shape. They all make use of channel spec and non of them provides non-documented sysfs attributes. Code style should be OK as well, both checkpatch and coccicheck only report trivial issues. So lets move the whole folder out of staging. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
539 lines
13 KiB
C
539 lines
13 KiB
C
/*
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* AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5648,
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* AD5666, AD5668 Digital to analog converters driver
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*
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* Copyright 2011 Analog Devices Inc.
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/regulator/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#define AD5064_MAX_DAC_CHANNELS 8
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#define AD5064_MAX_VREFS 4
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#define AD5064_ADDR(x) ((x) << 20)
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#define AD5064_CMD(x) ((x) << 24)
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#define AD5064_ADDR_DAC(chan) (chan)
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#define AD5064_ADDR_ALL_DAC 0xF
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#define AD5064_CMD_WRITE_INPUT_N 0x0
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#define AD5064_CMD_UPDATE_DAC_N 0x1
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#define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
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#define AD5064_CMD_WRITE_INPUT_N_UPDATE_N 0x3
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#define AD5064_CMD_POWERDOWN_DAC 0x4
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#define AD5064_CMD_CLEAR 0x5
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#define AD5064_CMD_LDAC_MASK 0x6
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#define AD5064_CMD_RESET 0x7
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#define AD5064_CMD_CONFIG 0x8
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#define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1)
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#define AD5064_CONFIG_INT_VREF_ENABLE BIT(0)
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#define AD5064_LDAC_PWRDN_NONE 0x0
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#define AD5064_LDAC_PWRDN_1K 0x1
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#define AD5064_LDAC_PWRDN_100K 0x2
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#define AD5064_LDAC_PWRDN_3STATE 0x3
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/**
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* struct ad5064_chip_info - chip specific information
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* @shared_vref: whether the vref supply is shared between channels
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* @internal_vref: internal reference voltage. 0 if the chip has no internal
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* vref.
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* @channel: channel specification
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* @num_channels: number of channels
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*/
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struct ad5064_chip_info {
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bool shared_vref;
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unsigned long internal_vref;
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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};
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/**
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* struct ad5064_state - driver instance specific data
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* @spi: spi_device
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* @chip_info: chip model specific constants, available modes etc
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* @vref_reg: vref supply regulators
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* @pwr_down: whether channel is powered down
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* @pwr_down_mode: channel's current power down mode
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* @dac_cache: current DAC raw value (chip does not support readback)
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* @use_internal_vref: set to true if the internal reference voltage should be
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* used.
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* @data: spi transfer buffers
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*/
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struct ad5064_state {
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struct spi_device *spi;
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const struct ad5064_chip_info *chip_info;
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struct regulator_bulk_data vref_reg[AD5064_MAX_VREFS];
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bool pwr_down[AD5064_MAX_DAC_CHANNELS];
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u8 pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
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unsigned int dac_cache[AD5064_MAX_DAC_CHANNELS];
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bool use_internal_vref;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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__be32 data ____cacheline_aligned;
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};
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enum ad5064_type {
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ID_AD5024,
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ID_AD5025,
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ID_AD5044,
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ID_AD5045,
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ID_AD5064,
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ID_AD5064_1,
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ID_AD5065,
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ID_AD5628_1,
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ID_AD5628_2,
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ID_AD5648_1,
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ID_AD5648_2,
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ID_AD5666_1,
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ID_AD5666_2,
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ID_AD5668_1,
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ID_AD5668_2,
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};
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static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
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unsigned int addr, unsigned int val, unsigned int shift)
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{
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val <<= shift;
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st->data = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
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return spi_write(st->spi, &st->data, sizeof(st->data));
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}
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static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
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unsigned int channel)
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{
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unsigned int val;
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int ret;
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val = (0x1 << channel);
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if (st->pwr_down[channel])
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val |= st->pwr_down_mode[channel] << 8;
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ret = ad5064_spi_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
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return ret;
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}
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static const char * const ad5064_powerdown_modes[] = {
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"1kohm_to_gnd",
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"100kohm_to_gnd",
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"three_state",
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};
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static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct ad5064_state *st = iio_priv(indio_dev);
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return st->pwr_down_mode[chan->channel] - 1;
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}
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static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, unsigned int mode)
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{
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struct ad5064_state *st = iio_priv(indio_dev);
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int ret;
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mutex_lock(&indio_dev->mlock);
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st->pwr_down_mode[chan->channel] = mode + 1;
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ret = ad5064_sync_powerdown_mode(st, chan->channel);
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mutex_unlock(&indio_dev->mlock);
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return ret;
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}
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static const struct iio_enum ad5064_powerdown_mode_enum = {
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.items = ad5064_powerdown_modes,
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.num_items = ARRAY_SIZE(ad5064_powerdown_modes),
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.get = ad5064_get_powerdown_mode,
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.set = ad5064_set_powerdown_mode,
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};
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static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private, const struct iio_chan_spec *chan, char *buf)
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{
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struct ad5064_state *st = iio_priv(indio_dev);
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return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
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}
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static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
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size_t len)
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{
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struct ad5064_state *st = iio_priv(indio_dev);
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bool pwr_down;
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int ret;
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ret = strtobool(buf, &pwr_down);
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if (ret)
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return ret;
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mutex_lock(&indio_dev->mlock);
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st->pwr_down[chan->channel] = pwr_down;
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ret = ad5064_sync_powerdown_mode(st, chan->channel);
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mutex_unlock(&indio_dev->mlock);
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return ret ? ret : len;
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}
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static int ad5064_get_vref(struct ad5064_state *st,
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struct iio_chan_spec const *chan)
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{
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unsigned int i;
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if (st->use_internal_vref)
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return st->chip_info->internal_vref;
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i = st->chip_info->shared_vref ? 0 : chan->channel;
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return regulator_get_voltage(st->vref_reg[i].consumer);
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}
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static int ad5064_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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{
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struct ad5064_state *st = iio_priv(indio_dev);
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int scale_uv;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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*val = st->dac_cache[chan->channel];
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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scale_uv = ad5064_get_vref(st, chan);
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if (scale_uv < 0)
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return scale_uv;
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scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
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*val = scale_uv / 100000;
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*val2 = (scale_uv % 100000) * 10;
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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break;
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}
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return -EINVAL;
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}
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static int ad5064_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int val, int val2, long mask)
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{
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struct ad5064_state *st = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (val > (1 << chan->scan_type.realbits) || val < 0)
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return -EINVAL;
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mutex_lock(&indio_dev->mlock);
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ret = ad5064_spi_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
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chan->address, val, chan->scan_type.shift);
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if (ret == 0)
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st->dac_cache[chan->channel] = val;
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mutex_unlock(&indio_dev->mlock);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static const struct iio_info ad5064_info = {
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.read_raw = ad5064_read_raw,
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.write_raw = ad5064_write_raw,
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.driver_module = THIS_MODULE,
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};
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static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
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{
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.name = "powerdown",
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.read = ad5064_read_dac_powerdown,
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.write = ad5064_write_dac_powerdown,
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},
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IIO_ENUM("powerdown_mode", false, &ad5064_powerdown_mode_enum),
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IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
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{ },
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};
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#define AD5064_CHANNEL(chan, bits) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.output = 1, \
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.channel = (chan), \
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.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
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IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
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.address = AD5064_ADDR_DAC(chan), \
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.scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \
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.ext_info = ad5064_ext_info, \
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}
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#define DECLARE_AD5064_CHANNELS(name, bits) \
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const struct iio_chan_spec name[] = { \
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AD5064_CHANNEL(0, bits), \
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AD5064_CHANNEL(1, bits), \
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AD5064_CHANNEL(2, bits), \
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AD5064_CHANNEL(3, bits), \
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AD5064_CHANNEL(4, bits), \
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AD5064_CHANNEL(5, bits), \
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AD5064_CHANNEL(6, bits), \
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AD5064_CHANNEL(7, bits), \
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}
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static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
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static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
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static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
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static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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[ID_AD5024] = {
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.shared_vref = false,
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.channels = ad5024_channels,
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.num_channels = 4,
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},
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[ID_AD5025] = {
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.shared_vref = false,
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.channels = ad5024_channels,
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.num_channels = 2,
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},
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[ID_AD5044] = {
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.shared_vref = false,
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.channels = ad5044_channels,
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.num_channels = 4,
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},
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[ID_AD5045] = {
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.shared_vref = false,
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.channels = ad5044_channels,
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.num_channels = 2,
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},
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[ID_AD5064] = {
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.shared_vref = false,
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.channels = ad5064_channels,
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.num_channels = 4,
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},
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[ID_AD5064_1] = {
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.shared_vref = true,
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.channels = ad5064_channels,
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.num_channels = 4,
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},
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[ID_AD5065] = {
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.shared_vref = false,
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.channels = ad5064_channels,
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.num_channels = 2,
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},
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[ID_AD5628_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5024_channels,
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.num_channels = 8,
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},
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[ID_AD5628_2] = {
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.shared_vref = true,
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.internal_vref = 5000000,
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.channels = ad5024_channels,
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.num_channels = 8,
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},
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[ID_AD5648_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5044_channels,
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.num_channels = 8,
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},
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[ID_AD5648_2] = {
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.shared_vref = true,
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.internal_vref = 5000000,
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.channels = ad5044_channels,
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.num_channels = 8,
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},
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[ID_AD5666_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5064_channels,
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.num_channels = 4,
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},
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[ID_AD5666_2] = {
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.shared_vref = true,
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.internal_vref = 5000000,
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.channels = ad5064_channels,
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.num_channels = 4,
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},
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[ID_AD5668_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5064_channels,
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.num_channels = 8,
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},
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[ID_AD5668_2] = {
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.shared_vref = true,
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.internal_vref = 5000000,
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.channels = ad5064_channels,
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.num_channels = 8,
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},
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};
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static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
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{
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return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
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}
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static const char * const ad5064_vref_names[] = {
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"vrefA",
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"vrefB",
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"vrefC",
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"vrefD",
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};
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static const char * const ad5064_vref_name(struct ad5064_state *st,
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unsigned int vref)
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{
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return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
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}
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static int __devinit ad5064_probe(struct spi_device *spi)
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{
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enum ad5064_type type = spi_get_device_id(spi)->driver_data;
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struct iio_dev *indio_dev;
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struct ad5064_state *st;
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unsigned int i;
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int ret;
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indio_dev = iio_device_alloc(sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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spi_set_drvdata(spi, indio_dev);
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st->chip_info = &ad5064_chip_info_tbl[type];
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st->spi = spi;
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for (i = 0; i < ad5064_num_vref(st); ++i)
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st->vref_reg[i].supply = ad5064_vref_name(st, i);
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ret = regulator_bulk_get(&st->spi->dev, ad5064_num_vref(st),
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st->vref_reg);
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if (ret) {
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if (!st->chip_info->internal_vref)
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goto error_free;
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st->use_internal_vref = true;
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ret = ad5064_spi_write(st, AD5064_CMD_CONFIG, 0,
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AD5064_CONFIG_INT_VREF_ENABLE, 0);
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if (ret) {
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dev_err(&spi->dev, "Failed to enable internal vref: %d\n",
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ret);
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goto error_free;
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}
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} else {
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ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
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if (ret)
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goto error_free_reg;
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}
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for (i = 0; i < st->chip_info->num_channels; ++i) {
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st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
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st->dac_cache[i] = 0x8000;
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}
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indio_dev->dev.parent = &spi->dev;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->info = &ad5064_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = st->chip_info->channels;
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indio_dev->num_channels = st->chip_info->num_channels;
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ret = iio_device_register(indio_dev);
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if (ret)
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goto error_disable_reg;
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return 0;
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error_disable_reg:
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if (!st->use_internal_vref)
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regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
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error_free_reg:
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if (!st->use_internal_vref)
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regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
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error_free:
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iio_device_free(indio_dev);
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return ret;
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}
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static int __devexit ad5064_remove(struct spi_device *spi)
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{
|
|
struct iio_dev *indio_dev = spi_get_drvdata(spi);
|
|
struct ad5064_state *st = iio_priv(indio_dev);
|
|
|
|
iio_device_unregister(indio_dev);
|
|
|
|
if (!st->use_internal_vref) {
|
|
regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
|
|
regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
|
|
}
|
|
|
|
iio_device_free(indio_dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct spi_device_id ad5064_id[] = {
|
|
{"ad5024", ID_AD5024},
|
|
{"ad5025", ID_AD5025},
|
|
{"ad5044", ID_AD5044},
|
|
{"ad5045", ID_AD5045},
|
|
{"ad5064", ID_AD5064},
|
|
{"ad5064-1", ID_AD5064_1},
|
|
{"ad5065", ID_AD5065},
|
|
{"ad5628-1", ID_AD5628_1},
|
|
{"ad5628-2", ID_AD5628_2},
|
|
{"ad5648-1", ID_AD5648_1},
|
|
{"ad5648-2", ID_AD5648_2},
|
|
{"ad5666-1", ID_AD5666_1},
|
|
{"ad5666-2", ID_AD5666_2},
|
|
{"ad5668-1", ID_AD5668_1},
|
|
{"ad5668-2", ID_AD5668_2},
|
|
{"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(spi, ad5064_id);
|
|
|
|
static struct spi_driver ad5064_driver = {
|
|
.driver = {
|
|
.name = "ad5064",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = ad5064_probe,
|
|
.remove = __devexit_p(ad5064_remove),
|
|
.id_table = ad5064_id,
|
|
};
|
|
module_spi_driver(ad5064_driver);
|
|
|
|
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
|
|
MODULE_DESCRIPTION("Analog Devices AD5024/25/44/45/64/64-1/65, AD5628/48/66/68 DAC");
|
|
MODULE_LICENSE("GPL v2");
|