forked from luck/tmp_suning_uos_patched
060ae855a8
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Acked-by: Hannes Reinecke <hare@suse.de> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
746 lines
19 KiB
Plaintext
746 lines
19 KiB
Plaintext
/*
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* DO NOT EDIT - This file is automatically generated
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* from the following source files:
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#120 $
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* $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#77 $
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*/
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#include "aic79xx_osm.h"
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static const ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
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{ "SPLTINT", 0x01, 0x01 },
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{ "CMDCMPLT", 0x02, 0x02 },
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{ "SEQINT", 0x04, 0x04 },
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{ "SCSIINT", 0x08, 0x08 },
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{ "PCIINT", 0x10, 0x10 },
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{ "SWTMINT", 0x20, 0x20 },
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{ "BRKADRINT", 0x40, 0x40 },
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{ "HWERRINT", 0x80, 0x80 },
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{ "INT_PEND", 0xff, 0xff }
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};
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int
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ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(INTSTAT_parse_table, 9, "INTSTAT",
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0x01, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
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{ "ENINT_COALESCE", 0x40, 0x40 },
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{ "HOST_TQINPOS", 0x80, 0x80 }
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};
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int
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ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(HS_MAILBOX_parse_table, 2, "HS_MAILBOX",
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0x0b, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
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{ "SEQ_SPLTINT", 0x01, 0x01 },
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{ "SEQ_PCIINT", 0x02, 0x02 },
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{ "SEQ_SCSIINT", 0x04, 0x04 },
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{ "SEQ_SEQINT", 0x08, 0x08 },
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{ "SEQ_SWTMRTO", 0x10, 0x10 }
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};
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int
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ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SEQINTSTAT_parse_table, 5, "SEQINTSTAT",
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0x0c, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t INTCTL_parse_table[] = {
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{ "SPLTINTEN", 0x01, 0x01 },
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{ "SEQINTEN", 0x02, 0x02 },
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{ "SCSIINTEN", 0x04, 0x04 },
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{ "PCIINTEN", 0x08, 0x08 },
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{ "AUTOCLRCMDINT", 0x10, 0x10 },
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{ "SWTIMER_START", 0x20, 0x20 },
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{ "SWTMINTEN", 0x40, 0x40 },
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{ "SWTMINTMASK", 0x80, 0x80 }
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};
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int
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ahd_intctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(INTCTL_parse_table, 8, "INTCTL",
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0x18, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
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{ "DIRECTIONEN", 0x01, 0x01 },
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{ "FIFOFLUSH", 0x02, 0x02 },
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{ "FIFOFLUSHACK", 0x02, 0x02 },
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{ "DIRECTION", 0x04, 0x04 },
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{ "DIRECTIONACK", 0x04, 0x04 },
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{ "HDMAEN", 0x08, 0x08 },
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{ "HDMAENACK", 0x08, 0x08 },
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{ "SCSIEN", 0x20, 0x20 },
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{ "SCSIENACK", 0x20, 0x20 },
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{ "SCSIENWRDIS", 0x40, 0x40 },
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{ "PRELOADEN", 0x80, 0x80 }
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};
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int
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ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(DFCNTRL_parse_table, 11, "DFCNTRL",
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0x19, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
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{ "FIFOEMP", 0x01, 0x01 },
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{ "FIFOFULL", 0x02, 0x02 },
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{ "DFTHRESH", 0x04, 0x04 },
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{ "HDONE", 0x08, 0x08 },
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{ "MREQPEND", 0x10, 0x10 },
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{ "PKT_PRELOAD_AVAIL", 0x40, 0x40 },
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{ "PRELOAD_AVAIL", 0x80, 0x80 }
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};
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int
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ahd_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(DFSTATUS_parse_table, 7, "DFSTATUS",
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0x1a, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
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{ "LAST_SEG_DONE", 0x01, 0x01 },
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{ "LAST_SEG", 0x02, 0x02 },
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{ "ODD_SEG", 0x04, 0x04 },
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{ "SG_ADDR_MASK", 0xf8, 0xf8 }
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};
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int
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ahd_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SG_CACHE_SHADOW_parse_table, 4, "SG_CACHE_SHADOW",
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0x1b, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
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{ "SCSIRSTO", 0x01, 0x01 },
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{ "FORCEBUSFREE", 0x10, 0x10 },
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{ "ENARBO", 0x20, 0x20 },
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{ "ENSELO", 0x40, 0x40 },
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{ "TEMODEO", 0x80, 0x80 }
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};
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int
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ahd_scsiseq0_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SCSISEQ0_parse_table, 5, "SCSISEQ0",
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0x3a, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
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{ "ALTSTIM", 0x01, 0x01 },
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{ "ENAUTOATNP", 0x02, 0x02 },
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{ "MANUALP", 0x0c, 0x0c },
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{ "ENRSELI", 0x10, 0x10 },
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{ "ENSELI", 0x20, 0x20 },
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{ "MANUALCTL", 0x40, 0x40 }
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};
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int
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ahd_scsiseq1_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SCSISEQ1_parse_table, 6, "SCSISEQ1",
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0x3b, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
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{ "CURRFIFO_0", 0x00, 0x03 },
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{ "CURRFIFO_1", 0x01, 0x03 },
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{ "CURRFIFO_NONE", 0x03, 0x03 },
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{ "FIFO0FREE", 0x10, 0x10 },
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{ "FIFO1FREE", 0x20, 0x20 },
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{ "CURRFIFO", 0x03, 0x03 }
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};
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int
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ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(DFFSTAT_parse_table, 6, "DFFSTAT",
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0x3f, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
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{ "P_DATAOUT", 0x00, 0xe0 },
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{ "P_DATAOUT_DT", 0x20, 0xe0 },
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{ "P_DATAIN", 0x40, 0xe0 },
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{ "P_DATAIN_DT", 0x60, 0xe0 },
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{ "P_COMMAND", 0x80, 0xe0 },
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{ "P_MESGOUT", 0xa0, 0xe0 },
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{ "P_STATUS", 0xc0, 0xe0 },
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{ "P_MESGIN", 0xe0, 0xe0 },
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{ "ACKI", 0x01, 0x01 },
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{ "REQI", 0x02, 0x02 },
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{ "BSYI", 0x04, 0x04 },
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{ "SELI", 0x08, 0x08 },
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{ "ATNI", 0x10, 0x10 },
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{ "MSGI", 0x20, 0x20 },
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{ "IOI", 0x40, 0x40 },
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{ "CDI", 0x80, 0x80 },
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{ "PHASE_MASK", 0xe0, 0xe0 }
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};
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int
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ahd_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
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0x41, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
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{ "DATA_OUT_PHASE", 0x01, 0x03 },
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{ "DATA_IN_PHASE", 0x02, 0x03 },
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{ "DATA_PHASE_MASK", 0x03, 0x03 },
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{ "MSG_OUT_PHASE", 0x04, 0x04 },
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{ "MSG_IN_PHASE", 0x08, 0x08 },
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{ "COMMAND_PHASE", 0x10, 0x10 },
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{ "STATUS_PHASE", 0x20, 0x20 }
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};
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int
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ahd_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
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0x42, regvalue, cur_col, wrap));
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}
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int
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ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(NULL, 0, "SCSIBUS",
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0x46, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SELID_parse_table[] = {
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{ "ONEBIT", 0x08, 0x08 },
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{ "SELID_MASK", 0xf0, 0xf0 }
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};
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int
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ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SELID_parse_table, 2, "SELID",
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0x49, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
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{ "ARBDO", 0x01, 0x01 },
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{ "SPIORDY", 0x02, 0x02 },
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{ "OVERRUN", 0x04, 0x04 },
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{ "IOERR", 0x08, 0x08 },
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{ "SELINGO", 0x10, 0x10 },
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{ "SELDI", 0x20, 0x20 },
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{ "SELDO", 0x40, 0x40 },
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{ "TARGET", 0x80, 0x80 }
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};
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int
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ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
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0x4b, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
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{ "ENARBDO", 0x01, 0x01 },
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{ "ENSPIORDY", 0x02, 0x02 },
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{ "ENOVERRUN", 0x04, 0x04 },
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{ "ENIOERR", 0x08, 0x08 },
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{ "ENSELINGO", 0x10, 0x10 },
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{ "ENSELDI", 0x20, 0x20 },
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{ "ENSELDO", 0x40, 0x40 }
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};
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int
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ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
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0x4b, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
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{ "REQINIT", 0x01, 0x01 },
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{ "STRB2FAST", 0x02, 0x02 },
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{ "SCSIPERR", 0x04, 0x04 },
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{ "BUSFREE", 0x08, 0x08 },
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{ "PHASEMIS", 0x10, 0x10 },
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{ "SCSIRSTI", 0x20, 0x20 },
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{ "ATNTARG", 0x40, 0x40 },
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{ "SELTO", 0x80, 0x80 }
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};
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int
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ahd_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SSTAT1_parse_table, 8, "SSTAT1",
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0x4c, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
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{ "BUSFREE_LQO", 0x40, 0xc0 },
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{ "BUSFREE_DFF0", 0x80, 0xc0 },
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{ "BUSFREE_DFF1", 0xc0, 0xc0 },
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{ "DMADONE", 0x01, 0x01 },
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{ "SDONE", 0x02, 0x02 },
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{ "WIDE_RES", 0x04, 0x04 },
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{ "BSYX", 0x08, 0x08 },
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{ "EXP_ACTIVE", 0x10, 0x10 },
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{ "NONPACKREQ", 0x20, 0x20 },
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{ "BUSFREETIME", 0xc0, 0xc0 }
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};
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int
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ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SSTAT2_parse_table, 10, "SSTAT2",
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0x4d, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
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{ "DTERR", 0x01, 0x01 },
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{ "DGFORMERR", 0x02, 0x02 },
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{ "CRCERR", 0x04, 0x04 },
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{ "AIPERR", 0x08, 0x08 },
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{ "PARITYERR", 0x10, 0x10 },
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{ "PREVPHASE", 0x20, 0x20 },
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{ "HIPERR", 0x40, 0x40 },
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{ "HIZERO", 0x80, 0x80 }
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};
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int
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ahd_perrdiag_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(PERRDIAG_parse_table, 8, "PERRDIAG",
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0x4e, regvalue, cur_col, wrap));
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}
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int
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ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(NULL, 0, "SOFFCNT",
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0x4f, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
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{ "LQIATNCMD", 0x01, 0x01 },
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{ "LQIATNLQ", 0x02, 0x02 },
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{ "LQIBADLQT", 0x04, 0x04 },
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{ "LQICRCT2", 0x08, 0x08 },
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{ "LQICRCT1", 0x10, 0x10 },
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{ "LQIATNQAS", 0x20, 0x20 }
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};
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int
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ahd_lqistat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(LQISTAT0_parse_table, 6, "LQISTAT0",
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0x50, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
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{ "LQIOVERI_NLQ", 0x01, 0x01 },
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{ "LQIOVERI_LQ", 0x02, 0x02 },
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{ "LQIBADLQI", 0x04, 0x04 },
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{ "LQICRCI_NLQ", 0x08, 0x08 },
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{ "LQICRCI_LQ", 0x10, 0x10 },
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{ "LQIABORT", 0x20, 0x20 },
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{ "LQIPHASE_NLQ", 0x40, 0x40 },
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{ "LQIPHASE_LQ", 0x80, 0x80 }
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};
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int
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ahd_lqistat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(LQISTAT1_parse_table, 8, "LQISTAT1",
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0x51, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
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{ "LQIGSAVAIL", 0x01, 0x01 },
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{ "LQISTOPCMD", 0x02, 0x02 },
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{ "LQISTOPLQ", 0x04, 0x04 },
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{ "LQISTOPPKT", 0x08, 0x08 },
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{ "LQIWAITFIFO", 0x10, 0x10 },
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{ "LQIWORKONLQ", 0x20, 0x20 },
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{ "LQIPHASE_OUTPKT", 0x40, 0x40 },
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{ "PACKETIZED", 0x80, 0x80 }
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};
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int
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ahd_lqistat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(LQISTAT2_parse_table, 8, "LQISTAT2",
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0x52, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
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{ "OSRAMPERR", 0x01, 0x01 },
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{ "NTRAMPERR", 0x02, 0x02 }
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};
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int
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ahd_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(SSTAT3_parse_table, 2, "SSTAT3",
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0x53, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
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{ "LQOTCRC", 0x01, 0x01 },
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{ "LQOATNPKT", 0x02, 0x02 },
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{ "LQOATNLQ", 0x04, 0x04 },
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{ "LQOSTOPT2", 0x08, 0x08 },
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{ "LQOTARGSCBPERR", 0x10, 0x10 }
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};
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int
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ahd_lqostat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahd_print_register(LQOSTAT0_parse_table, 5, "LQOSTAT0",
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0x54, regvalue, cur_col, wrap));
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}
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static const ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
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{ "LQOPHACHGINPKT", 0x01, 0x01 },
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|
{ "LQOBUSFREE", 0x02, 0x02 },
|
|
{ "LQOBADQAS", 0x04, 0x04 },
|
|
{ "LQOSTOPI2", 0x08, 0x08 },
|
|
{ "LQOINITSCBPERR", 0x10, 0x10 }
|
|
};
|
|
|
|
int
|
|
ahd_lqostat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(LQOSTAT1_parse_table, 5, "LQOSTAT1",
|
|
0x55, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
|
|
{ "LQOSTOP0", 0x01, 0x01 },
|
|
{ "LQOPHACHGOUTPKT", 0x02, 0x02 },
|
|
{ "LQOWAITFIFO", 0x10, 0x10 },
|
|
{ "LQOPKT", 0xe0, 0xe0 }
|
|
};
|
|
|
|
int
|
|
ahd_lqostat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(LQOSTAT2_parse_table, 4, "LQOSTAT2",
|
|
0x56, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
|
|
{ "ENREQINIT", 0x01, 0x01 },
|
|
{ "ENSTRB2FAST", 0x02, 0x02 },
|
|
{ "ENSCSIPERR", 0x04, 0x04 },
|
|
{ "ENBUSFREE", 0x08, 0x08 },
|
|
{ "ENPHASEMIS", 0x10, 0x10 },
|
|
{ "ENSCSIRST", 0x20, 0x20 },
|
|
{ "ENATNTARG", 0x40, 0x40 },
|
|
{ "ENSELTIMO", 0x80, 0x80 }
|
|
};
|
|
|
|
int
|
|
ahd_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SIMODE1_parse_table, 8, "SIMODE1",
|
|
0x57, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
|
|
{ "RSTCHN", 0x01, 0x01 },
|
|
{ "CLRCHN", 0x02, 0x02 },
|
|
{ "CLRSHCNT", 0x04, 0x04 },
|
|
{ "DFFBITBUCKET", 0x08, 0x08 }
|
|
};
|
|
|
|
int
|
|
ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(DFFSXFRCTL_parse_table, 4, "DFFSXFRCTL",
|
|
0x5a, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
|
|
{ "CFG4TCMD", 0x01, 0x01 },
|
|
{ "CFG4ICMD", 0x02, 0x02 },
|
|
{ "CFG4TSTAT", 0x04, 0x04 },
|
|
{ "CFG4ISTAT", 0x08, 0x08 },
|
|
{ "CFG4DATA", 0x10, 0x10 },
|
|
{ "SAVEPTRS", 0x20, 0x20 },
|
|
{ "CTXTDONE", 0x40, 0x40 }
|
|
};
|
|
|
|
int
|
|
ahd_seqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SEQINTSRC_parse_table, 7, "SEQINTSRC",
|
|
0x5b, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
|
|
{ "ENCFG4TCMD", 0x01, 0x01 },
|
|
{ "ENCFG4ICMD", 0x02, 0x02 },
|
|
{ "ENCFG4TSTAT", 0x04, 0x04 },
|
|
{ "ENCFG4ISTAT", 0x08, 0x08 },
|
|
{ "ENCFG4DATA", 0x10, 0x10 },
|
|
{ "ENSAVEPTRS", 0x20, 0x20 },
|
|
{ "ENCTXTDONE", 0x40, 0x40 }
|
|
};
|
|
|
|
int
|
|
ahd_seqimode_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SEQIMODE_parse_table, 7, "SEQIMODE",
|
|
0x5c, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
|
|
{ "FIFOFREE", 0x01, 0x01 },
|
|
{ "DATAINFIFO", 0x02, 0x02 },
|
|
{ "DLZERO", 0x04, 0x04 },
|
|
{ "SHVALID", 0x08, 0x08 },
|
|
{ "LASTSDONE", 0x10, 0x10 },
|
|
{ "SHCNTMINUS1", 0x20, 0x20 },
|
|
{ "SHCNTNEGATIVE", 0x40, 0x40 }
|
|
};
|
|
|
|
int
|
|
ahd_mdffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(MDFFSTAT_parse_table, 7, "MDFFSTAT",
|
|
0x5d, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "SELOID",
|
|
0x6b, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
|
|
{ "SEGS_AVAIL", 0x01, 0x01 },
|
|
{ "LOADING_NEEDED", 0x02, 0x02 },
|
|
{ "FETCH_INPROG", 0x04, 0x04 }
|
|
};
|
|
|
|
int
|
|
ahd_sg_state_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SG_STATE_parse_table, 3, "SG_STATE",
|
|
0xa6, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
|
|
{ "CCSCBRESET", 0x01, 0x01 },
|
|
{ "CCSCBDIR", 0x04, 0x04 },
|
|
{ "CCSCBEN", 0x08, 0x08 },
|
|
{ "CCARREN", 0x10, 0x10 },
|
|
{ "ARRDONE", 0x40, 0x40 },
|
|
{ "CCSCBDONE", 0x80, 0x80 }
|
|
};
|
|
|
|
int
|
|
ahd_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
|
|
0xad, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
|
|
{ "CCSGRESET", 0x01, 0x01 },
|
|
{ "SG_FETCH_REQ", 0x02, 0x02 },
|
|
{ "CCSGENACK", 0x08, 0x08 },
|
|
{ "SG_CACHE_AVAIL", 0x10, 0x10 },
|
|
{ "CCSGDONE", 0x80, 0x80 },
|
|
{ "CCSGEN", 0x0c, 0x0c }
|
|
};
|
|
|
|
int
|
|
ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
|
|
0xad, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
|
|
{ "LOADRAM", 0x01, 0x01 },
|
|
{ "SEQRESET", 0x02, 0x02 },
|
|
{ "STEP", 0x04, 0x04 },
|
|
{ "BRKADRINTEN", 0x08, 0x08 },
|
|
{ "FASTMODE", 0x10, 0x10 },
|
|
{ "FAILDIS", 0x20, 0x20 },
|
|
{ "PAUSEDIS", 0x40, 0x40 },
|
|
{ "PERRORDIS", 0x80, 0x80 }
|
|
};
|
|
|
|
int
|
|
ahd_seqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SEQCTL0_parse_table, 8, "SEQCTL0",
|
|
0xd6, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
|
|
{ "IRET", 0x01, 0x01 },
|
|
{ "INTMASK1", 0x02, 0x02 },
|
|
{ "INTMASK2", 0x04, 0x04 },
|
|
{ "SCS_SEQ_INT1M0", 0x08, 0x08 },
|
|
{ "SCS_SEQ_INT1M1", 0x10, 0x10 },
|
|
{ "INT1_CONTEXT", 0x20, 0x20 },
|
|
{ "INTVEC1DSL", 0x80, 0x80 }
|
|
};
|
|
|
|
int
|
|
ahd_seqintctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SEQINTCTL_parse_table, 7, "SEQINTCTL",
|
|
0xd9, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "SRAM_BASE",
|
|
0x100, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "QFREEZE_COUNT",
|
|
0x132, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_kernel_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT",
|
|
0x134, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_saved_mode_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "SAVED_MODE",
|
|
0x136, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
|
|
{ "NO_DISCONNECT", 0x01, 0x01 },
|
|
{ "SPHASE_PENDING", 0x02, 0x02 },
|
|
{ "DPHASE_PENDING", 0x04, 0x04 },
|
|
{ "CMDPHASE_PENDING", 0x08, 0x08 },
|
|
{ "TARG_CMD_PENDING", 0x10, 0x10 },
|
|
{ "DPHASE", 0x20, 0x20 },
|
|
{ "NO_CDB_SENT", 0x40, 0x40 },
|
|
{ "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
|
|
{ "NOT_IDENTIFIED", 0x80, 0x80 }
|
|
};
|
|
|
|
int
|
|
ahd_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
|
|
0x139, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
|
|
{ "P_DATAOUT", 0x00, 0xe0 },
|
|
{ "P_DATAOUT_DT", 0x20, 0xe0 },
|
|
{ "P_DATAIN", 0x40, 0xe0 },
|
|
{ "P_DATAIN_DT", 0x60, 0xe0 },
|
|
{ "P_COMMAND", 0x80, 0xe0 },
|
|
{ "P_MESGOUT", 0xa0, 0xe0 },
|
|
{ "P_STATUS", 0xc0, 0xe0 },
|
|
{ "P_MESGIN", 0xe0, 0xe0 },
|
|
{ "P_BUSFREE", 0x01, 0x01 },
|
|
{ "MSGI", 0x20, 0x20 },
|
|
{ "IOI", 0x40, 0x40 },
|
|
{ "CDI", 0x80, 0x80 },
|
|
{ "PHASE_MASK", 0xe0, 0xe0 }
|
|
};
|
|
|
|
int
|
|
ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(LASTPHASE_parse_table, 13, "LASTPHASE",
|
|
0x13c, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
|
|
{ "PENDING_MK_MESSAGE", 0x01, 0x01 },
|
|
{ "TARGET_MSG_PENDING", 0x02, 0x02 },
|
|
{ "SELECTOUT_QFROZEN", 0x04, 0x04 }
|
|
};
|
|
|
|
int
|
|
ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SEQ_FLAGS2_parse_table, 3, "SEQ_FLAGS2",
|
|
0x14d, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_mk_message_scb_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCB",
|
|
0x160, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_mk_message_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "MK_MESSAGE_SCSIID",
|
|
0x162, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
int
|
|
ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(NULL, 0, "SCB_BASE",
|
|
0x180, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
|
|
{ "SCB_TAG_TYPE", 0x03, 0x03 },
|
|
{ "DISCONNECTED", 0x04, 0x04 },
|
|
{ "STATUS_RCVD", 0x08, 0x08 },
|
|
{ "MK_MESSAGE", 0x10, 0x10 },
|
|
{ "TAG_ENB", 0x20, 0x20 },
|
|
{ "DISCENB", 0x40, 0x40 },
|
|
{ "TARGET_SCB", 0x80, 0x80 }
|
|
};
|
|
|
|
int
|
|
ahd_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SCB_CONTROL_parse_table, 7, "SCB_CONTROL",
|
|
0x192, regvalue, cur_col, wrap));
|
|
}
|
|
|
|
static const ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
|
|
{ "OID", 0x0f, 0x0f },
|
|
{ "TID", 0xf0, 0xf0 }
|
|
};
|
|
|
|
int
|
|
ahd_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
|
|
{
|
|
return (ahd_print_register(SCB_SCSIID_parse_table, 2, "SCB_SCSIID",
|
|
0x193, regvalue, cur_col, wrap));
|
|
}
|
|
|