forked from luck/tmp_suning_uos_patched
268e2519f5
We observed performance increase with DMA copy from memory to MMIO by changing the interrupt coalescing value to 0. The previous set value was projected on the C5xxx Xeon platform and no longer holds true. Removing hard coded value and providing a tune-able in sysfs in order to allow user to tune this on a per channel basis. By default this value will be set to 0. Example of sysfs variable importing for interrupt coalescing value from command line: echo 5> /sys/devices/pci0000:00/0000:00:04.0/dma/dma0chan0/ quickdata/intr_coalesce Reported-by: Nithin Sujir <nsujir@tintri.com> Signed-off-by: Ujjal Singh <ujjal.singh@intel.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> |
||
---|---|---|
.. | ||
dca.c | ||
dma.c | ||
dma.h | ||
hw.h | ||
init.c | ||
Makefile | ||
prep.c | ||
registers.h | ||
sysfs.c |